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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
14 Smart CODEC and Amp devices. It allows the connection of most Cirrus
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-ringneck-haikou.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "px30-ringneck.dtsi"
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
12 model = "Theobroma Systems PX30-uQ7 SoM on Haikou devkit";
13 compatible = "tsd,px30-ringneck-haikou", "rockchip,px30";
21 stdout-path = "serial0:115200n8";
24 gpio-keys {
25 compatible = "gpio-keys";
[all …]
H A Drk3588-tiger-haikou.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
9 #include "rk3588-tiger.dtsi"
12 model = "Theobroma Systems RK3588-Q7 SoM on Haikou devkit";
13 compatible = "tsd,rk3588-tiger-haikou", "tsd,rk3588-tiger", "rockchip,rk3588";
21 stdout-path = "serial2:115200n8";
24 dc_12v: regulator-dc-12v {
25 compatible = "regulator-fixed";
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-wandboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
12 stdout-path = &uart1;
16 compatible = "fsl,imx6-wandboard-sgtl5000",
17 "fsl,imx-audio-sgtl5000";
18 model = "imx6-wandboard-sgtl5000";
19 ssi-controller = <&ssi1>;
20 audio-codec = <&codec>;
21 audio-routing =
25 mux-int-port = <1>;
[all …]
H A Dimx25-eukrea-mbimxsd25-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "imx25-eukrea-cpuimx25.dtsi"
14 compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
16 gpio-keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpiokeys>;
[all …]
H A Dimx6qdl-hummingboard.dtsi4 * This file is dual-licensed: you can use it either under the terms
41 #include <dt-bindings/sound/fsl-imx-audmux.h>
56 stdout-path = &uart1;
59 ir_recv: ir-receiver {
60 compatible = "gpio-ir-receiver";
61 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
66 v_3v2: regulator-v-3v2 {
67 compatible = "regulator-fixed";
[all …]
H A Dimx6qdl-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pwm/pwm.h>
18 /delete-property/ mmc3;
28 compatible = "pwm-backlight";
29 brightness-levels = <0 45 63 88 119 158 203 255>;
30 default-brightness-level = <4>;
31 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
32 pinctrl-names = "default";
[all …]
H A Dimx6q-tbs2910.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";
16 stdout-path = &uart1;
23 /delete-property/ mmc3;
32 compatible = "gpio-fan";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_gpio_fan>;
[all …]
/linux/drivers/pinctrl/cirrus/
H A Dpinctrl-lochnagar.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2017-2018 Cirrus Logic, Inc. and
21 #include <linux/pinctrl/pinconf-generic.h>
30 #include <dt-bindings/pinctrl/lochnagar.h>
32 #include "../pinctrl-utils.h"
36 #define LN_CDC_AIF1_STR "codec-aif1"
37 #define LN_CDC_AIF2_STR "codec-aif2"
38 #define LN_CDC_AIF3_STR "codec-aif3"
39 #define LN_DSP_AIF1_STR "dsp-aif1"
40 #define LN_DSP_AIF2_STR "dsp-aif2"
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Duda1334.txt1 UDA1334 audio CODEC
3 This device uses simple GPIO pins for controlling codec settings.
7 - compatible : "nxp,uda1334"
8 - nxp,mute-gpios: a GPIO spec for the MUTE pin.
9 - nxp,deemph-gpios: a GPIO spec for the De-emphasis pin
13 uda1334: audio-codec {
15 nxp,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
16 nxp,deemph-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
H A Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus Logic CS42L43 Audio CODEC
10 - patches@opensource.cirrus.com
13 The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
31 vdd-p-supply:
35 vdd-a-supply:
[all …]
H A Drt5668.txt1 RT5668B audio CODEC
7 - compatible : "realtek,rt5668b"
9 - reg : The I2C address of the device.
13 - interrupts : The CODEC's interrupt output.
15 - realtek,dmic1-data-pin
20 - realtek,dmic1-clk-pin
22 1: using GPIO3 pin as dmic1 clock pin
24 - realtek,jd-src
28 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
43 interrupt-parent = <&gpio>;
[all …]
H A Drealtek,rt5677.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RT5677 audio CODEC
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
30 - $ref: dai-common.yaml#
42 gpio-controller: true
44 '#gpio-cells':
47 realtek,pow-ldo2-gpio:
49 description: CODEC's POW_LDO2 pin.
[all …]
H A Drealtek,rt5682s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek rt5682s codec
10 - Derek Fang <derek.fang@realtek.com>
13 Rt5682s(ALC5682I-VS) is a rt5682i variant which supports I2C only.
16 - $ref: dai-common.yaml#
28 description: The CODEC's interrupt output.
30 realtek,dmic1-data-pin:
33 - 0 # dmic1 data is not used
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-m28evk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include "imx28-m28.dtsi"
15 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <6>;
21 reg_vddio_sd0: regulator-1 {
22 compatible = "regulator-fixed";
23 regulator-name = "vddio-sd0";
24 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx28-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
10 compatible = "fsl,imx28-evk", "fsl,imx28";
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
26 reg_vddio_sd0: regulator-vddio-sd0 {
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
17 compatible = "purism,librem5-devkit", "fsl,imx8mq";
19 backlight_dsi: backlight-dsi {
[all …]
H A Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
[all …]
H A Dimx93-phyboard-segin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * phyBOARD-Segin carrier board is reused for the i.MX93 design.
9 * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
11 /dts-v1/;
13 #include "imx93-phycore-som.dtsi"
16 model = "PHYTEC phyBOARD-Segin-i.MX93";
17 compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
27 stdout-path = &lpuart1;
30 flexcan1_tc: can-phy0 {
32 #phy-cells = <0>;
[all …]
H A Dimx95-tqma9596sa-mb-smarc-2.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include "imx95-tqma9596sa.dtsi"
14 model = "TQ-Systems i.MX95 TQMa95xxSA on MB-SMARC-2";
15 compatible = "tq,imx95-tqma9596sa-mb-smarc-2", "tq,imx95-tqma9596sa", "fsl,imx95";
20 gpio2 = &gpio3;
21 gpio3 = &gpio4;
[all …]
H A Dimx8mm-prt8mm.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/usb/pd.h>
17 stdout-path = &uart4;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpio_leds>;
30 debug-led0 {
32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
33 linux,default-trigger = "heartbeat";
[all …]
H A Dimx93-9x9-qsb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
15 bt_sco_codec: bt-sco-codec {
16 #sound-dai-cells = <1>;
17 compatible = "linux,bt-sco";
21 stdout-path = &lpuart1;
24 reserved-memory {
25 #address-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7794-silk.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 Renesas Solutions Corp.
7 * Copyright (C) 2014-2015 Cogent Embedded, Inc.
11 * SSI-AK4643
13 * SW1: 2-1: AK4643
14 * 2-3: ADV7511
21 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include <dt-bindings/input/input.h>
40 stdout-path = "serial0:115200n8";
[all …]
/linux/sound/hda/codecs/cirrus/
H A Dcs420x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Cirrus Logic CS420x HD-audio codec
52 /* Vendor-specific processing widget */
65 * 1 = digital immediate, analog zero-cross
66 * 2 = digtail & analog soft-ramp
67 * 3 = digital soft-ramp, analog zero-cross
71 #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
72 /* PGA mode: 0 = differential, 1 = signle-ended */
74 #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
78 * 1 = zero-cross
[all …]

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