xref: /linux/arch/arm/boot/dts/nxp/imx/imx6qdl-vicut1.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright (c) 2014 Protonic Holland
4 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5 */
6
7#include <dt-bindings/display/sdtv-standards.h>
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/leds/common.h>
11#include <dt-bindings/media/tvp5150.h>
12#include <dt-bindings/sound/fsl-imx-audmux.h>
13
14/ {
15	chosen {
16		stdout-path = &uart4;
17	};
18
19	backlight_lcd: backlight {
20		compatible = "pwm-backlight";
21		pinctrl-names = "default";
22		pinctrl-0 = <&pinctrl_backlight>;
23		pwms = <&pwm1 0 5000000 0>;
24		brightness-levels = <0 16 64 255>;
25		num-interpolated-steps = <16>;
26		default-brightness-level = <48>;
27		power-supply = <&reg_3v3>;
28		enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
29	};
30
31	backlight_led: backlight-led {
32		compatible = "pwm-backlight";
33		pwms = <&pwm3 0 5000000 0>;
34		brightness-levels = <0 16 64 255>;
35		num-interpolated-steps = <16>;
36		default-brightness-level = <48>;
37		power-supply = <&reg_3v3>;
38	};
39
40	/* only for backwards compatibility with old HW */
41	backlight_isb: backlight-isb {
42		compatible = "pwm-backlight";
43		pwms = <&pwm2 0 5000000 0>;
44		brightness-levels = <0 8 48 255>;
45		num-interpolated-steps = <5>;
46		default-brightness-level = <0>;
47		power-supply = <&reg_3v3>;
48	};
49
50	connector {
51		compatible = "composite-video-connector";
52		label = "Composite0";
53		sdtv-standards = <SDTV_STD_PAL_B>;
54
55		port {
56			comp0_out: endpoint {
57				remote-endpoint = <&tvp5150_comp0_in>;
58			};
59		};
60	};
61
62	counter-0 {
63		compatible = "interrupt-counter";
64		pinctrl-names = "default";
65		pinctrl-0 = <&pinctrl_counter0>;
66		gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
67	};
68
69	counter-1 {
70		compatible = "interrupt-counter";
71		pinctrl-names = "default";
72		pinctrl-0 = <&pinctrl_counter1>;
73		gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
74	};
75
76	counter-2 {
77		compatible = "interrupt-counter";
78		pinctrl-names = "default";
79		pinctrl-0 = <&pinctrl_counter2>;
80		gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
81	};
82
83	leds {
84		compatible = "gpio-leds";
85		pinctrl-names = "default";
86		pinctrl-0 = <&pinctrl_leds>;
87
88		led-0 {
89			label = "debug0";
90			function = LED_FUNCTION_HEARTBEAT;
91			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
92			linux,default-trigger = "heartbeat";
93		};
94
95		led-1 {
96			label = "debug1";
97			function = LED_FUNCTION_DISK;
98			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
99			linux,default-trigger = "disk-activity";
100		};
101
102		led-2 {
103			label = "power_led";
104			function = LED_FUNCTION_POWER;
105			gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
106			default-state = "on";
107		};
108
109		led-3 {
110			label = "isb_led";
111			function = LED_FUNCTION_POWER;
112			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
113			default-state = "on";
114		};
115	};
116
117	reg_1v8: regulator-1v8 {
118		compatible = "regulator-fixed";
119		regulator-name = "1v8";
120		regulator-min-microvolt = <1800000>;
121		regulator-max-microvolt = <1800000>;
122	};
123
124	reg_3v3: regulator-3v3 {
125		compatible = "regulator-fixed";
126		regulator-name = "3v3";
127		regulator-min-microvolt = <3300000>;
128		regulator-max-microvolt = <3300000>;
129	};
130
131	reg_otg_vbus: regulator-otg-vbus {
132		compatible = "regulator-fixed";
133		regulator-name = "otg-vbus";
134		regulator-min-microvolt = <5000000>;
135		regulator-max-microvolt = <5000000>;
136		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
137		enable-active-high;
138	};
139
140	sound {
141		compatible = "simple-audio-card";
142		simple-audio-card,name = "prti6q-sgtl5000";
143		simple-audio-card,format = "i2s";
144		simple-audio-card,widgets =
145			"Microphone", "Microphone Jack",
146			"Line", "Line In Jack",
147			"Headphone", "Headphone Jack",
148			"Speaker", "External Speaker";
149		simple-audio-card,routing =
150			"MIC_IN", "Microphone Jack",
151			"LINE_IN", "Line In Jack",
152			"Headphone Jack", "HP_OUT",
153			"External Speaker", "LINE_OUT";
154
155		simple-audio-card,cpu {
156			sound-dai = <&ssi1>;
157			system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
158		};
159
160		simple-audio-card,codec {
161			sound-dai = <&codec>;
162			bitclock-master;
163			frame-master;
164		};
165	};
166
167	thermal-zones {
168		chassis-thermal {
169			polling-delay = <20000>;
170			polling-delay-passive = <0>;
171			thermal-sensors = <&tsens0>;
172
173			trips {
174				alert {
175					temperature = <105000>; /* millicelsius */
176					hysteresis = <2000>; /* millicelsius */
177					type = "passive";
178				};
179			};
180		};
181	};
182};
183
184&audmux {
185	pinctrl-names = "default";
186	pinctrl-0 = <&pinctrl_audmux>;
187	status = "okay";
188
189	mux-ssi1 {
190		fsl,audmux-port = <0>;
191		fsl,port-config = <
192			IMX_AUDMUX_V2_PTCR_SYN		0
193			IMX_AUDMUX_V2_PTCR_TFSEL(2)	0
194			IMX_AUDMUX_V2_PTCR_TCSEL(2)	0
195			IMX_AUDMUX_V2_PTCR_TFSDIR	0
196			IMX_AUDMUX_V2_PTCR_TCLKDIR	IMX_AUDMUX_V2_PDCR_RXDSEL(2)
197		>;
198	};
199
200	mux-pins3 {
201		fsl,audmux-port = <2>;
202		fsl,port-config = <
203			IMX_AUDMUX_V2_PTCR_SYN		IMX_AUDMUX_V2_PDCR_RXDSEL(0)
204			0				IMX_AUDMUX_V2_PDCR_TXRXEN
205		>;
206	};
207};
208
209&can1 {
210	pinctrl-names = "default";
211	pinctrl-0 = <&pinctrl_can1>;
212	termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
213	termination-ohms = <150>;
214	status = "okay";
215};
216
217&can2 {
218	pinctrl-names = "default";
219	pinctrl-0 = <&pinctrl_can2>;
220	status = "okay";
221};
222
223&clks {
224	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
225	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
226};
227
228&ecspi1 {
229	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
230	pinctrl-names = "default";
231	pinctrl-0 = <&pinctrl_ecspi1>;
232	status = "okay";
233
234	flash@0 {
235		compatible = "jedec,spi-nor";
236		reg = <0>;
237		spi-max-frequency = <20000000>;
238	};
239};
240
241&gpio2 {
242	gpio-line-names =
243		"YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
244		"", "LED_PWM", "", "", "",
245			"", "", "",
246		"", "", "", "", "", "ISB_IN2", "ISB_nIN1", "ON_SWITCH",
247		"POWER_LED", "", "", "", "", "", "", "";
248};
249
250&gpio3 {
251	gpio-line-names =
252		"", "", "", "", "", "", "", "",
253		"", "", "", "", "", "", "", "",
254		"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
255			"CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
256		"TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
257			"YACO_RESET";
258};
259
260&gpio7 {
261	gpio-line-names =
262		"EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
263			"EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
264		"EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
265		"", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
266		"", "", "", "", "", "", "", "";
267};
268
269&i2c1 {
270	clock-frequency = <100000>;
271	pinctrl-names = "default";
272	pinctrl-0 = <&pinctrl_i2c1>;
273	status = "okay";
274
275	codec: audio-codec@a {
276		compatible = "fsl,sgtl5000";
277		reg = <0xa>;
278		#sound-dai-cells = <0>;
279		clocks = <&clks 201>;
280		VDDA-supply = <&reg_3v3>;
281		VDDIO-supply = <&reg_3v3>;
282		VDDD-supply = <&reg_1v8>;
283	};
284
285	video-decoder@5c {
286		compatible = "ti,tvp5150";
287		reg = <0x5c>;
288		#address-cells = <1>;
289		#size-cells = <0>;
290
291		port@0 {
292			reg = <0>;
293
294			tvp5150_comp0_in: endpoint {
295				remote-endpoint = <&comp0_out>;
296			};
297		};
298
299		/* Output port 2 is video output pad */
300		port@2 {
301			reg = <2>;
302
303			tvp5151_to_ipu1_csi0_mux: endpoint {
304				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
305			};
306		};
307	};
308};
309
310&i2c3 {
311	clock-frequency = <100000>;
312	pinctrl-names = "default";
313	pinctrl-0 = <&pinctrl_i2c3>;
314	status = "okay";
315
316	adc@49 {
317		compatible = "ti,ads1015";
318		reg = <0x49>;
319		#address-cells = <1>;
320		#size-cells = <0>;
321
322		channel@4 {
323			reg = <4>;
324			ti,gain = <3>;
325			ti,datarate = <3>;
326		};
327
328		channel@5 {
329			reg = <5>;
330			ti,gain = <3>;
331			ti,datarate = <3>;
332		};
333
334		channel@6 {
335			reg = <6>;
336			ti,gain = <3>;
337			ti,datarate = <3>;
338		};
339
340		channel@7 {
341			reg = <7>;
342			ti,gain = <3>;
343			ti,datarate = <3>;
344		};
345	};
346
347	rtc@51 {
348		compatible = "nxp,pcf8563";
349		reg = <0x51>;
350	};
351
352	tsens0: temperature-sensor@70 {
353		compatible = "ti,tmp103";
354		reg = <0x70>;
355		#thermal-sensor-cells = <0>;
356	};
357};
358
359&ipu1_csi0 {
360	pinctrl-names = "default";
361	pinctrl-0 = <&pinctrl_ipu1_csi0>;
362	status = "okay";
363};
364
365&ipu1_csi0_mux_from_parallel_sensor {
366	remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
367};
368
369&ldb {
370	status = "okay";
371
372	lvds-channel@0 {
373		status = "okay";
374
375		port@4 {
376			reg = <4>;
377
378			lvds0_out: endpoint {
379				remote-endpoint = <&panel_in>;
380			};
381		};
382	};
383};
384
385&pwm1 {
386	pinctrl-names = "default";
387	pinctrl-0 = <&pinctrl_pwm1>;
388	status = "okay";
389};
390
391&pwm2 {
392	pinctrl-names = "default";
393	pinctrl-0 = <&pinctrl_pwm2>;
394	status = "okay";
395};
396
397&pwm3 {
398	pinctrl-names = "default";
399	pinctrl-0 = <&pinctrl_pwm3>;
400	status = "okay";
401};
402
403&ssi1 {
404	status = "okay";
405};
406
407&uart1 {
408	pinctrl-names = "default";
409	pinctrl-0 = <&pinctrl_uart1>;
410	status = "okay";
411};
412
413&uart3 {
414	pinctrl-names = "default";
415	pinctrl-0 = <&pinctrl_uart3>;
416	status = "okay";
417};
418
419&uart4 {
420	pinctrl-names = "default";
421	pinctrl-0 = <&pinctrl_uart4>;
422	status = "okay";
423};
424
425&uart5 {
426	pinctrl-names = "default";
427	pinctrl-0 = <&pinctrl_uart5>;
428	status = "okay";
429};
430
431&usbh1 {
432	pinctrl-names = "default";
433	phy_type = "utmi";
434	dr_mode = "host";
435	disable-over-current;
436	status = "okay";
437};
438
439&usbotg {
440	vbus-supply = <&reg_otg_vbus>;
441	pinctrl-names = "default";
442	pinctrl-0 = <&pinctrl_usbotg>;
443	phy_type = "utmi";
444	dr_mode = "host";
445	disable-over-current;
446	status = "okay";
447};
448
449&usbphynop1 {
450	status = "disabled";
451};
452
453&usbphynop2 {
454	status = "disabled";
455};
456
457&usdhc1 {
458	pinctrl-names = "default";
459	pinctrl-0 = <&pinctrl_usdhc1>;
460	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
461	no-1-8-v;
462	disable-wp;
463	cap-sd-highspeed;
464	no-mmc;
465	no-sdio;
466	status = "okay";
467};
468
469&usdhc3 {
470	pinctrl-names = "default";
471	pinctrl-0 = <&pinctrl_usdhc3>;
472	bus-width = <8>;
473	no-1-8-v;
474	non-removable;
475	no-sd;
476	no-sdio;
477	status = "okay";
478};
479
480&iomuxc {
481	pinctrl-names = "default";
482	pinctrl-0 = <&pinctrl_hog>;
483
484	pinctrl_audmux: audmuxgrp {
485		fsl,pins = <
486			/* SGTL5000 sys_mclk */
487			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1			0x030b0
488			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD			0x130b0
489			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC			0x130b0
490			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD			0x110b0
491			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS			0x130b0
492		>;
493	};
494
495	pinctrl_backlight: backlightgrp {
496		fsl,pins = <
497			MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28		0x1b0b0
498		>;
499	};
500
501	pinctrl_can1: can1grp {
502		fsl,pins = <
503			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
504			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
505			/* CAN1_SR */
506			MX6QDL_PAD_KEY_COL3__GPIO4_IO12			0x13008
507			/* CAN1_TERM */
508			MX6QDL_PAD_GPIO_0__GPIO1_IO00			0x1b088
509		>;
510	};
511
512	pinctrl_can2: can2grp {
513		fsl,pins = <
514			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b000
515			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x3008
516			/* CAN2_SR */
517			MX6QDL_PAD_KEY_ROW3__GPIO4_IO13			0x13008
518		>;
519	};
520
521	pinctrl_counter0: counter0grp {
522		fsl,pins = <
523			MX6QDL_PAD_NANDF_D0__GPIO2_IO00			0x1b000
524		>;
525	};
526
527	pinctrl_counter1: counter1grp {
528		fsl,pins = <
529			MX6QDL_PAD_NANDF_D1__GPIO2_IO01			0x1b000
530		>;
531	};
532
533	pinctrl_counter2: counter2grp {
534		fsl,pins = <
535			MX6QDL_PAD_NANDF_D2__GPIO2_IO02			0x1b000
536		>;
537	};
538
539	pinctrl_ecspi1: ecspi1grp {
540		fsl,pins = <
541			MX6QDL_PAD_EIM_D17__ECSPI1_MISO			0x100b1
542			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI			0x100b1
543			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK			0x100b1
544			/* CS */
545			MX6QDL_PAD_EIM_D19__GPIO3_IO19			0x000b1
546		>;
547	};
548
549	pinctrl_hog: hoggrp {
550		fsl,pins = <
551			/* ITU656_nRESET */
552			MX6QDL_PAD_GPIO_2__GPIO1_IO02			0x1b0b0
553			/* CAM1_MIRROR */
554			MX6QDL_PAD_GPIO_3__GPIO1_IO03			0x130b0
555			/* CAM2_MIRROR */
556			MX6QDL_PAD_GPIO_4__GPIO1_IO04			0x130b0
557			/* CAM_nDETECT */
558			MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x1b0b0
559			/* ISB_IN1 */
560			MX6QDL_PAD_EIM_A16__GPIO2_IO22			0x130b0
561			/* ISB_nIN2 */
562			MX6QDL_PAD_EIM_A17__GPIO2_IO21			0x1b0b0
563			/* WARN_LIGHT */
564			MX6QDL_PAD_EIM_A19__GPIO2_IO19			0x100b0
565			/* ON2_FB */
566			MX6QDL_PAD_EIM_A25__GPIO5_IO02			0x100b0
567			/* YACO_nIRQ */
568			MX6QDL_PAD_EIM_D23__GPIO3_IO23			0x1b0b0
569			/* YACO_BOOT0 */
570			MX6QDL_PAD_EIM_D30__GPIO3_IO30			0x130b0
571			/* YACO_nRESET */
572			MX6QDL_PAD_EIM_D31__GPIO3_IO31			0x1b0b0
573			/* FORCE_ON1 */
574			MX6QDL_PAD_EIM_EB2__GPIO2_IO30			0x1b0b0
575			/* AUDIO_nRESET */
576			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21		0x1f0b0
577			/* ITU656_nPDN */
578			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20		0x1b0b0
579
580			/* New in HW revision 1 */
581			/* ON1_FB */
582			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x100b0
583			/* DIP1_FB */
584			MX6QDL_PAD_DI0_PIN2__GPIO4_IO18			0x1b0b0
585		>;
586	};
587
588	pinctrl_i2c1: i2c1grp {
589		fsl,pins = <
590			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001f8b1
591			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001f8b1
592		>;
593	};
594
595	pinctrl_i2c3: i2c3grp {
596		fsl,pins = <
597			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
598			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
599		>;
600	};
601
602	pinctrl_ipu1_csi0: ipu1csi0grp {
603		fsl,pins = <
604			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
605			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
606			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
607			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
608			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
609			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
610			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
611			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
612			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
613		>;
614	};
615
616	pinctrl_leds: ledsgrp {
617		fsl,pins = <
618			/* DEBUG0 */
619			MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16		0x1b0b0
620			/* DEBUG1 */
621			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17		0x1b0b0
622			/* POWER_LED */
623			MX6QDL_PAD_EIM_CS1__GPIO2_IO24			0x1b0b0
624			/* ISB_LED */
625			MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31		0x1b0b0
626		>;
627	};
628
629	pinctrl_pwm1: pwm1grp {
630		fsl,pins = <
631			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT			0x1b0b0
632		>;
633	};
634
635	pinctrl_pwm2: pwm2grp {
636		fsl,pins = <
637			MX6QDL_PAD_DISP0_DAT9__PWM2_OUT			0x1b0b0
638		>;
639	};
640
641	pinctrl_pwm3: pwm3grp {
642		fsl,pins = <
643			MX6QDL_PAD_SD4_DAT1__PWM3_OUT			0x1b0b0
644		>;
645	};
646
647	/* YaCO AUX Uart */
648	pinctrl_uart1: uart1grp {
649		fsl,pins = <
650			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA		0x1b0b1
651			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA		0x1b0b1
652		>;
653	};
654
655	/* YaCO Touchscreen UART */
656	pinctrl_uart3: uart3grp {
657		fsl,pins = <
658			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
659			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
660		>;
661	};
662
663	pinctrl_uart4: uart4grp {
664		fsl,pins = <
665			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
666			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
667		>;
668	};
669
670	pinctrl_uart5: uart5grp {
671		fsl,pins = <
672			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA		0x1b0b1
673			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA		0x1b0b1
674		>;
675	};
676
677	pinctrl_usbotg: usbotggrp {
678		fsl,pins = <
679			MX6QDL_PAD_EIM_D21__USB_OTG_OC			0x1b0b0
680			/* power enable, high active */
681			MX6QDL_PAD_EIM_D22__GPIO3_IO22			0x1b0b0
682		>;
683	};
684
685	pinctrl_usdhc1: usdhc1grp {
686		fsl,pins = <
687			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
688			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
689			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
690			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
691			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
692			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
693			MX6QDL_PAD_GPIO_1__GPIO1_IO01			0x1b0b0
694		>;
695	};
696
697	pinctrl_usdhc3: usdhc3grp {
698		fsl,pins = <
699			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
700			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
701			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
702			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
703			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
704			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
705			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
706			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
707			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
708			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
709			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
710		>;
711	};
712};
713