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/linux/arch/sh/kernel/cpu/sh2/
H A Dsetup-sh7619.c22 WDT, EDMAC, CMT0, CMT1, enumerator
35 INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
51 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7206.c30 CMT0, CMT1, BSC, WDT, enumerator
60 INTC_IRQ(CMT0, 140), INTC_IRQ(CMT1, 144),
112 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
H A Dsetup-sh7203.c22 USB, LCDC, CMT0, CMT1, BSC, WDT, enumerator
62 INTC_IRQ(CMT0, 142), INTC_IRQ(CMT1, 143),
143 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { USB, LCDC, CMT0, CMT1 } },
H A Dsetup-sh7269.c26 USB, VDC4, CMT0, CMT1, BSC, WDT, enumerator
88 INTC_IRQ(CMT0, 188), INTC_IRQ(CMT1, 189),
219 { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },
H A Dsetup-sh7264.c25 USB, VDC3, CMT0, CMT1, BSC, WDT, enumerator
80 INTC_IRQ(CMT0, 175), INTC_IRQ(CMT1, 176),
200 { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC3, CMT0, CMT1 } },
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7745-iwg22m.dtsi29 &cmt0 {
H A Dr8a7792.dtsi958 cmt0: timer@ffca0000 { label
959 compatible = "renesas,r8a7792-cmt0",
960 "renesas,rcar-gen2-cmt0";
H A Dr8a7790-stout.dts220 &cmt0 {
H A Dr8a77470.dtsi1025 cmt0: timer@ffca0000 { label
1026 compatible = "renesas,r8a77470-cmt0",
1027 "renesas,rcar-gen2-cmt0";
H A Dr8a7794-alt.dts361 &cmt0 {
/linux/drivers/clocksource/
H A Dsh_cmt.c55 * CMT0 on r8a7740, which is a 32-bit variant with a single channel numbered 0
59 * Similarly CMT0 on r8a73a4, r8a7790 and r8a7791, while implementing 32-bit
1029 .compatible = "renesas,rcar-gen2-cmt0",
1037 .compatible = "renesas,rcar-gen3-cmt0",
1045 .compatible = "renesas,rcar-gen4-cmt0",
/linux/drivers/clk/renesas/
H A Dr8a7792-cpg-mssr.c87 DEF_MOD("cmt0", 124, R8A7792_CLK_R),
H A Dr8a77470-cpg-mssr.c86 DEF_MOD("cmt0", 124, R8A77470_CLK_R),
H A Dr8a779f0-cpg-mssr.c160 DEF_MOD("cmt0", 910, R8A779F0_CLK_R),
H A Dr8a77995-cpg-mssr.c143 DEF_MOD("cmt0", 303, R8A77995_CLK_R),
H A Dr8a7745-cpg-mssr.c90 DEF_MOD("cmt0", 124, R8A7745_CLK_R),
H A Dr8a77980-cpg-mssr.c134 DEF_MOD("cmt0", 303, R8A77980_CLK_R),
H A Dr8a7794-cpg-mssr.c97 DEF_MOD("cmt0", 124, R8A7794_CLK_R),
H A Dr8a7791-cpg-mssr.c101 DEF_MOD("cmt0", 124, R8A7791_CLK_R),
H A Dr8a7790-cpg-mssr.c107 DEF_MOD("cmt0", 124, R8A7790_CLK_R),
H A Dr8a7742-cpg-mssr.c96 DEF_MOD("cmt0", 124, R8A7742_CLK_R),
H A Dr8a774c0-cpg-mssr.c156 DEF_MOD("cmt0", 303, R8A774C0_CLK_R),
H A Dr8a7743-cpg-mssr.c91 DEF_MOD("cmt0", 124, R8A7743_CLK_R),
H A Dr8a77990-cpg-mssr.c158 DEF_MOD("cmt0", 303, R8A77990_CLK_R),
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779f0.dtsi393 cmt0: timer@e60f0000 { label
394 compatible = "renesas,r8a779f0-cmt0",
395 "renesas,rcar-gen4-cmt0";

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