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/linux/arch/arm64/boot/dts/apple/
H A Dt600x-dieX.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 DIE_NODE(cpufreq_e): cpufreq@210e20000 {
10 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
12 #performance-domain-cells = <0>;
15 DIE_NODE(cpufreq_p0): cpufreq@211e20000 {
16 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
18 #performance-domain-cells = <0>;
21 DIE_NODE(cpufreq_p1): cpufreq@212e20000 {
22 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
24 #performance-domain-cells = <0>;
[all …]
/linux/drivers/cpufreq/
H A Dapple-soc-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Apple SoC CPU cluster performance state driver
7 * Based on scpi-cpufreq.c
13 #include <linux/cpufreq.h>
117 .compatible = "apple,s5l8960x-cluster-cpufreq",
121 .compatible = "apple,t8103-cluster-cpufreq",
125 .compatible = "apple,t8112-cluster-cpufreq",
129 .compatible = "apple,cluster-cpufreq",
146 priv = policy->driver_data; in apple_soc_cpufreq_get_rate()
148 if (priv->info->cur_pstate_mask) { in apple_soc_cpufreq_get_rate()
[all …]
H A Darmada-8k-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0+
3 * CPUFreq support for Armada 8K
25 { .compatible = "marvell,ap806-cpu-clock" },
26 { .compatible = "marvell,ap807-cpu-clock" },
44 /* If the CPUs share the same clock, then they are in the same cluster. */
84 return -EINVAL; in armada_8k_add_opp()
141 return -ENODEV; in armada_8k_cpufreq_init()
148 return -ENOMEM; in armada_8k_cpufreq_init()
189 armada_8k_pdev = platform_device_register_simple("cpufreq-dt", -1, in armada_8k_cpufreq_init()
215 MODULE_DESCRIPTION("Armada 8K cpufreq driver");
H A Dmediatek-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
9 #include <linux/cpufreq.h>
30 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
33 * 100mV < Vsram - Vproc < 200mV
71 if (cpumask_test_cpu(cpu, &info->cpu in mtk_cpu_dvfs_info_lookup()
[all...]
/linux/Documentation/driver-api/thermal/
H A Dcpu-cooling-api.rst21 1.1 cpufreq registration/unregistration APIs
22 --------------------------------------------
29 This interface function registers the cpufreq cooling device with the name
30 "thermal-cpufreq-%x". This api can support multiple instances of cpufreq
41 This interface function registers the cpufreq cooling device with
42 the name "thermal-cpufreq-%x" linking it with a device tree node, in
44 instances of cpufreq cooling devices.
47 CPUFreq policy.
54 This interface function unregisters the "thermal-cpufreq-%x" cooling device.
63 supported currently). This power model requires that the operating-points of
[all …]
H A Dcpu-idle-cooling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ----------
26 budget lower than the requested one and under-utilize the CPU, thus
27 losing performance. In other words, one OPP under-utilizes the CPU
33 ----------
42 the control precision of cpufreq, however different vendors have a
48 belong to the same cluster, with a duration greater than the cluster
58 ---------------
63 cpufreq. Ideally, if all CPUs belonging to the same cluster, inject
64 their idle cycles synchronously, the cluster can reach its power down
[all …]
/linux/drivers/base/
H A Darch_topology.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/cpufreq.h>
53 * either cpufreq or counter driven. If the support status changes as in update_scale_freq_invariant()
71 * supported by cpufreq. in topology_set_scale_freq_source()
82 if (!sfd || sfd->source != SCALE_FREQ_SOURCE_ARCH) { in topology_set_scale_freq_source()
105 if (sfd && sfd->source == source) { in topology_clear_scale_freq_source()
115 * use-after-free races. in topology_clear_scale_freq_source()
128 sfd->set_freq_scale(); in topology_scale_freq_tick()
145 * want to update the scale factor with information from CPUFREQ. in topology_set_freq_scale()
160 * topology_update_hw_pressure() - Update HW pressure for CPUs
[all …]
/linux/Documentation/admin-guide/pm/
H A Dintel_uncore_frequency_scaling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
22 the scaling min/max frequencies via cpufreq sysfs to improve CPU performance.
26 use both cpufreq and the uncore scaling interface to distribute power and
30 ---------------
45 This is a read-only attribute. If users adjust max_freq_khz,
50 This is a read-only attribute. If users adjust min_freq_khz,
63 -----------------------------------------------------------------
66 of mesh partitions. This partition is called fabric cluster.
[all …]
/linux/drivers/devfreq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 Like some CPUs with CPUfreq, a device may have multiple clocks.
20 to a device by 1-to-1. The device registering devfreq takes the
38 similar as ONDEMAND governor of CPUFREQ does. A device with
39 Simple-Ondemand should be able to provide busy/total counter
89 PPMU counters of memory controllers by using DEVFREQ-event device
139 which is shared the same regulators with the cpu cluster. It can track
/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom,rpmhpd.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
[all …]
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
12 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
14 #include <dt-bindings/clock/qcom,rpmh.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
9 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
H A Dagatti.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
11 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
12 #include <dt-bindings/clock/qcom,rpmcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
H A Dtalos.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,qcs615-camcc.h>
8 #include <dt-bindings/clock/qcom,qcs615-dispcc.h>
9 #include <dt-bindings/clock/qcom,qcs615-gcc.h>
10 #include <dt-bindings/clock/qcom,qcs615-gpucc.h>
11 #include <dt-bindings/clock/qcom,qcs615-videocc.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
[all …]
H A Dsc8180x.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
9 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,sc8180x-camcc.h>
13 #include <dt-bindings/clock/qcom,videocc-sm8150.h>
[all …]
H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt6 1 - Introduction
15 2 - CPU capacity definition
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
29 * A "single-threaded" or CPU affine benchmark
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
53 fall back to the default capacity value for every CPU. If cpufreq is not
54 available, final capacities are calculated by directly using capacity-dmips-
[all …]
/linux/tools/power/x86/turbostat/
H A Dturbostat.83 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv…
29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri…
39 … event for given device from /sys/bus/event_source/devices/<device>/events/<event> eg. c1-residency
40 …perf/cstate_core/c1-residency would then use /sys/bus/event_source/devices/cstate_core/events/c1-r…
[all …]
/linux/drivers/watchdog/
H A Ds3c2410_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #include <linux/cpufreq.h>
92 * DOC: Quirk flags for different Samsung watchdog IP-cores
97 * differences in both watchdog and PMU IP-cores should be accounted for. Quirk
104 * write-only, writing any values to this register clears the interrupt, but
129 * %QUIRK_HAS_32BIT_CNT: WTDAT and WTCNT are 32-bit registers. With these
130 * 32-bit registers, larger values will be set, which means that larger timeouts
166 * struct s3c2410_wdt_variant - Per-variant config data
379 { .compatible = "google,gs101-wdt",
381 { .compatible = "samsung,s3c2410-wdt",
[all …]
/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
47 # https://github.com/llvm/llvm-project/commit/d130f402642fba3d065aacb506cb061c899558de
164 The ARM series is a line of low-power-consumption RISC chip designs
166 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
167 manufactured, but legacy ARM-based PC hardware remains popular in
175 relocations. The combined range is -/+ 256 MiB, which is usually
268 Patch phys-to-virt and virt-to-phys translation functions at
272 This can only be used with non-XIP MMU kernels where the base
318 bool "MMU-based Paged Memory Management Support"
321 Select if you want MMU-based virtualised addressing space
[all …]
/linux/arch/arm/mach-tegra/
H A Dsleep-tegra30.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/asm-offsets.h>
81 .arch armv7-a
192 * Puts the current CPU in wait-for-event mode on the flow controller
193 * and powergates it -- flags (in R0) indicate the request type.
196 * corrupts r0-r4, r10-r12
293 * CPU power-gating process, to avoid loading from SDRAM which
294 * are not supported once SDRAM is put into self-refresh.
296 * disabled before putting SDRAM into self-refresh to avoid
356 * self-refresh, PLLC, PLLM and PLLP reenabled, CPU running on PLLX,
[all …]
/linux/drivers/pmdomain/qcom/
H A Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
272 val = readl_relaxed(drv->base + offset); in cpr_masked_write()
275 writel_relaxed(val, drv->base + offset); in cpr_masked_write()
[all …]

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