| /linux/Documentation/sound/codecs/ |
| H A D | tas675x.rst | 50 :Description: Analog output gain for all channels (CH1/CH2 and CH3/CH4 pairs). 54 :Register: 0x4A (CH1/CH2), 0x4B (CH3/CH4) 73 :Register: 0x40 (CH1), 0x41 (CH2), 0x42 (CH3), 0x43 (CH4) 120 CH3/4 Volume Combine 123 :Description: Links digital volume controls for CH3 and CH4. 126 :Options: Independent, CH4 follows CH3, CH3 follows CH4 138 :Register: 0x47 bit [0] (CH1), bit [1] (CH2), bit [2] (CH3), bit [3] (CH4) 159 0x49 bits [7:4] (CH3), bits [3:0] (CH4) 264 0xE3 bits [6:4] (CH3), bits [2:0] (CH4) 296 0xBC bits [2:0] (CH3), bits [5:3] (CH4) [all …]
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| /linux/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-dai-tdm.c | 145 "CH0", "CH1", "CH2", "CH3", 350 {"HDMI_CH0_MUX", "CH3", "HDMI"}, 359 {"HDMI_CH1_MUX", "CH3", "HDMI"}, 368 {"HDMI_CH2_MUX", "CH3", "HDMI"}, 377 {"HDMI_CH3_MUX", "CH3", "HDMI"}, 386 {"HDMI_CH4_MUX", "CH3", "HDMI"}, 395 {"HDMI_CH5_MUX", "CH3", "HDMI"}, 404 {"HDMI_CH6_MUX", "CH3", "HDMI"}, 413 {"HDMI_CH7_MUX", "CH3", "HDMI"},
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| /linux/sound/soc/codecs/ |
| H A D | tas675x.c | 95 REG_SEQ0(TAS675X_PAGE_REG(1, 0xC3), 0x00), /* CH3 DC fault */ 227 { "auto-mute-ch3", TAS675X_GPIO_SEL_AUTO_MUTE_CH3 }, 415 "DC LDG: abort timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger() 442 "DC LDG: LOAD_DIAG timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger() 468 "DC LDG: SLEEP timeout (CH1/2=0x%02x [%s/%s], CH3/4=0x%02x [%s/%s])\n", in tas675x_set_dcldg_trigger() 474 dev_dbg(tas->dev, "DC LDG: Completed successfully (CH1/2=0x%02x, CH3/4=0x%02x)\n", in tas675x_set_dcldg_trigger() 545 "AC LDG: CH3/CH4 timeout: %d (state=0x%02x [%s/%s])\n", in tas675x_set_acldg_trigger() 552 dev_dbg(tas->dev, "AC LDG: Completed successfully (CH1/2=0x%02x, CH3/4=0x%02x)\n", in tas675x_set_acldg_trigger() 618 /* 2-bit MSB: CH1=[7:6], CH2=[5:4], CH3=[3:2], CH4=[1:0] */ in tas675x_get_dc_resistance() 815 "Independent", "CH4 follows CH3", "CH3 follows CH4" [all …]
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| H A D | peb2466.c | 561 SND_SOC_DAPM_SUPPLY("CH3 PWR", PEB2466_CR1(3), 0, 0, NULL, 0), 566 SND_SOC_DAPM_DAC("CH3 DIN", "Playback", SND_SOC_NOPM, 0, 0), 571 SND_SOC_DAPM_SIGGEN("CH3 TG1"), 576 SND_SOC_DAPM_SIGGEN("CH3 TG2"), 616 { "CH3 DIN", NULL, "CH3 PWR" }, 621 { "CH3 TG1", NULL, "CH3 PWR" }, 626 { "CH3 TG2", NULL, "CH3 PW [all...] |
| H A D | sta350.c | 439 SOC_SINGLE_TLV("Ch3 Volume", STA350_C3VOL, 0, 0xff, 1, chvol_tlv), 464 SOC_SINGLE("Ch3 Switch", STA350_MMUTE, STA350_MMUTE_C3M_SHIFT, 1, 1), 481 SOC_SINGLE("Ch3 Master Volume Bypass Switch", 485 SOC_ENUM("Ch3 Binary Output Select", sta350_binary_output_ch3_enum), 488 SOC_ENUM("Ch3 Limiter Select", sta350_limiter_ch3_enum), 542 SINGLE_COEF("Ch3 - Postscale", 54), 548 SINGLE_COEF("Ch3 - Mix 1", 60), 549 SINGLE_COEF("Ch3 - Mix 2", 61), 1103 of_property_read_u8(np, "st,ch3-output-mapping", in sta350_probe_dt()
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| H A D | sta32x.c | 445 SOC_SINGLE("Ch3 Switch", STA32X_MMUTE, 3, 1, 1), 448 SOC_SINGLE_TLV("Ch3 Volume", STA32X_C3VOL, 0, 0xff, 1, chvol_tlv), 465 SOC_SINGLE("Ch3 Master Volume Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_VBP_SHIFT, 1, 0), 468 SOC_ENUM("Ch3 Limiter Select", sta32x_limiter_ch3_enum), 510 SINGLE_COEF("Ch3 - Postscale", 54), 516 SINGLE_COEF("Ch3 - Mix 1", 60), 517 SINGLE_COEF("Ch3 - Mix 2", 61), 1050 of_property_read_u8(np, "st,ch3-output-mapping", in sta32x_probe_dt()
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| H A D | ak5558.c | 109 SND_SOC_DAPM_ADC("ADC Ch3", NULL, AK5558_00_POWER_MANAGEMENT1, 2, 0), 137 {"ADC Ch3", NULL, "AIN3"}, 138 {"SDTO", NULL, "ADC Ch3"},
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| H A D | rtq9128.c | 241 static const char * const source_select_text[] = { "CH1", "CH2", "CH3", "CH4" }; 306 SOC_SINGLE_TLV("CH3 Volume", RTQ9128_REG_CH3_VOL, 2, 511, 1, dig_tlv), 315 SOC_ENUM("CH3 SI Select", rtq9128_ch3_si_enum), 328 SOC_SINGLE_TLV("CH3 Volume", RTQ9154_REG_CH3_VOL, 2, 511, 1, dig_tlv), 337 SOC_ENUM("CH3 SI Select", rtq9154_ch3_si_enum),
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| H A D | tlv320adcx140.c | 263 SOC_DAPM_ENUM("CH3 Resistor Select", in3_resistor_enum), 390 SOC_DAPM_SINGLE("Digital CH3 Switch", 0, 0, 0, 0), 454 SND_SOC_DAPM_ADC("CH3_ADC", "CH3 Capture", ADCX140_IN_CH_EN, 5, 0), 459 SND_SOC_DAPM_ADC("CH3_DIG", "CH3 Capture", ADCX140_IN_CH_EN, 5, 0), 687 SOC_SINGLE_TLV("Analog CH3 Mic Gain Volume", ADCX140_CH3_CFG1, 2, 42, 0, 706 SOC_SINGLE_TLV("Digital CH3 Out Volume", ADCX140_CH3_CFG2,
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| /linux/sound/soc/mediatek/mt8192/ |
| H A D | mt8192-dai-tdm.c | 137 "CH0", "CH1", "CH2", "CH3", 398 {"HDMI_CH0_MUX", "CH3", "HDMI"}, 407 {"HDMI_CH1_MUX", "CH3", "HDMI"}, 416 {"HDMI_CH2_MUX", "CH3", "HDMI"}, 425 {"HDMI_CH3_MUX", "CH3", "HDMI"}, 434 {"HDMI_CH4_MUX", "CH3", "HDMI"}, 443 {"HDMI_CH5_MUX", "CH3", "HDMI"}, 452 {"HDMI_CH6_MUX", "CH3", "HDMI"}, 461 {"HDMI_CH7_MUX", "CH3", "HDMI"},
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| /linux/tools/perf/tests/ |
| H A D | api-io.c | 134 __u64 val3, int ch3, in do_test_get_hex() argument 155 EXPECT_EQUAL(ch, ch3); in do_test_get_hex() 215 __u64 val3, int ch3, in do_test_get_dec() argument 236 EXPECT_EQUAL(ch, ch3); in do_test_get_dec()
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | st,sta350.txt | 32 - st,ch3-output-mapping: Channel 3 output mapping 125 st,ch3-output-mapping = /bits/ 8 <0>; // set channel 3 output ch 1
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| H A D | audio-iio-aux.yaml | 61 io-channel-names = "CH0", "CH1", "CH2", "CH3";
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| /linux/drivers/iio/adc/ |
| H A D | intel_mrfld_adc.c | 158 BCOVE_ADC_CHANNEL(IIO_TEMP, 3, "CH3", 0xCC), 170 IIO_MAP("CH3", "bcove-temp", "PMICTEMP"),
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| H A D | intel_dc_ti_adc.c | 89 .datasheet_name = "CH3", 98 IIO_MAP("CH3", "chtdc_ti_battery", "SYSTEMP0"),
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | st,stmpe-adc.yaml | 40 st,norequest-mask = <0x0f>; /* dont use ADC CH3-0 */
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| H A D | ti,ads7924.yaml | 106 label = "CH3";
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| /linux/Documentation/devicetree/bindings/clock/st/ |
| H A D | st,quadfs.txt | 47 "clk-s-c0-fs0-ch3";
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| /linux/Documentation/devicetree/bindings/leds/backlight/ |
| H A D | mediatek,mt6370-backlight.yaml | 89 - 1: CH3
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| /linux/arch/arm/boot/dts/intel/pxa/ |
| H A D | pxa300-raumfeld-speaker-one.dts | 121 st,ch3-output-mapping = /bits/ 8 <2>;
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| /linux/Documentation/hwmon/ |
| H A D | smpro-hwmon.rst | 65 temp8_input millicelsius RO Temperature of DIMM0 on CH3
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| /linux/arch/arm/boot/dts/axis/ |
| H A D | artpec6.dtsi | 255 "ch0", "ch1", "ch2", "ch3", 277 "ch0", "ch1", "ch2", "ch3",
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| /linux/drivers/clk/st/ |
| H A D | clkgen-fsyn.c | 132 { .name = "clk-s-c0-fs0-ch3", }, 189 { .name = "clk-s-d0-fs0-ch3", }, 201 { .name = "clk-s-d2-fs0-ch3", }, 213 { .name = "clk-s-d3-fs0-ch3", },
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| /linux/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-dai-etdm.c | 608 "CH0", "CH1", "CH2", "CH3", "CH4", "CH5", "CH6", "CH7", 1217 {"HDMI_CH0_MUX", "CH3", "DL10"}, 1226 {"HDMI_CH1_MUX", "CH3", "DL10"}, 1235 {"HDMI_CH2_MUX", "CH3", "DL10"}, 1244 {"HDMI_CH3_MUX", "CH3", "DL10"}, 1253 {"HDMI_CH4_MUX", "CH3", "DL10"}, 1262 {"HDMI_CH5_MUX", "CH3", "DL10"}, 1271 {"HDMI_CH6_MUX", "CH3", "DL10"}, 1280 {"HDMI_CH7_MUX", "CH3", "DL10"},
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| /linux/sound/usb/usx2y/ |
| H A D | us144mkii_controls.c | 325 * This defines a new ALSA mixer control named "ch3 and ch4 Source" that allows 333 .name = "Ch3/4 Capture Source",
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