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/linux/arch/x86/kvm/svm/
H A Davic.c37 * use whatever bits remain to assign arbitrary AVIC IDs to VMs. Note, the
95 * Note: KVM supports hybrid-AVIC mode, where KVM emulates x2APIC MSR in avic_activate_vmcb()
97 * achieved using AVIC doorbell. KVM disables the APIC access page in avic_activate_vmcb()
99 * AVIC in hybrid mode activates only the doorbell mechanism. in avic_activate_vmcb()
109 * mapping into the TLB while AVIC was disabled. in avic_activate_vmcb()
294 * Note, AVIC hardware walks the nested page table to check in avic_init_backing_page()
306 /* Setting AVIC backing page address in the phy APIC ID table */ in avic_init_backing_page()
353 * KVM inhibits AVIC if any vCPU ID diverges from the vCPUs APIC ID, in avic_kick_vcpu_by_physical_id()
453 * AVIC is inhibited if vCPUs aren't mapped 1:1 with logical in avic_kick_target_vcpus_fast()
505 * Emulate IPIs that are not handled by AVIC hardware, which in avic_incomplete_ipi_interception()
[all …]
H A Dsvm.h76 VMCB_AVIC, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
77 * AVIC PHYSICAL_TABLE pointer,
78 * AVIC LOGICAL_TABLE pointer
120 /* Struct members for AVIC */
678 /* avic.c */
H A Dsvm.c135 * the AVIC hardware would generate GP fault. Therefore, always
228 * enable / disable AVIC. Because the defaults differ for APICv
231 static bool avic; variable
232 module_param(avic, bool, 0444);
1639 * The following fields are ignored when AVIC is enabled in svm_set_vintr()
3244 * If not running nested, for AVIC, the only reason to end up here is ExtINTs. in interrupt_window_interception()
3245 * In this case AVIC was temporarily disabled for in interrupt_window_interception()
3248 * If running nested, still remove the VM wide AVIC inhibit to in interrupt_window_interception()
3253 * AVIC still inhibited due to per-cpu AVIC inhibition. in interrupt_window_interception()
3733 * will automatically process AVIC interrupts at the next VMRUN. in svm_complete_interrupt_delivery()
[all …]
/linux/arch/arm/mach-imx/
H A Davic.c97 * The LPIMR registers use 0 to allow an interrupt, the AVIC in avic_irq_suspend()
130 gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, in avic_init_gc()
162 * This function initializes the AVIC hardware and disables all the
186 /* put the AVIC into the reset value with in mxc_init_irq()
203 np = of_find_compatible_node(NULL, NULL, "fsl,avic"); in mxc_init_irq()
236 IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
H A Dhardware.h49 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
57 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
63 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
H A Dmm-imx3.c75 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
116 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
H A Dmx3x.h19 * FC400000 68000000 128M AVIC
98 * ROMP and AVIC
H A DMakefile15 obj-$(CONFIG_MXC_AVIC) += avic.o
/linux/tools/testing/selftests/kvm/x86_64/
H A Dxapic_state_test.c
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx31.dtsi44 avic: interrupt-controller@68000000 { label
45 compatible = "fsl,imx31-avic", "fsl,avic";
55 interrupt-parent = <&avic>;
H A Dimx6qdl-savageboard.dtsi70 compatible = "avic,tm097tdh02", "hannstar,hsd100pxn1";
H A Dimx1.dtsi35 compatible = "fsl,imx1-aitc", "fsl,avic";
H A Dimx27.dtsi44 compatible = "fsl,imx27-aitc", "fsl,avic";
H A Dimx25.dtsi57 compatible = "fsl,imx25-asic", "fsl,avic";
/linux/Documentation/devicetree/bindings/edac/
H A Daspeed-sdram-edac.txt19 - interrupts: should be AVIC interrupt #0
/linux/arch/x86/include/asm/
H A Dkvm_host.h1222 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1245 * was enabled, to avoid AVIC/APICv bypassing it.
1264 /* INHIBITs that are relevant only to the AMD's AVIC. */
1268 * AVIC is inhibited on a vCPU because it runs a nested guest.
1271 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1278 * which cannot be injected when the AVIC is enabled, thus AVIC
1285 * which AVIC doesn't support for edge triggered interrupts.
1290 * AVIC is disabled because SEV doesn't support it.
1295 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
H A Dcpufeatures.h382 #define X86_FEATURE_AVIC (15*32+13) /* "avic" Virtual Interrupt Controller */
/linux/include/linux/
H A Damd-iommu.h44 /* IOMMU AVIC Function */
/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-simple.yaml64 # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
65 - avic,tm070ddh03
/linux/drivers/irqchip/
H A Dirq-aspeed-vic.c152 .name = "AVIC",
/linux/Documentation/devicetree/bindings/
H A Dvendor-prefixes.yaml191 "^avic,.*":
192 description: Shanghai AVIC Optoelectronics Co., Ltd.
/linux/arch/x86/kvm/
H A Dioapic.c224 * AMD SVM AVIC accelerate EOI write iff the interrupt is edge in ioapic_set_irq()
/linux/tools/arch/x86/include/asm/
H A Dcpufeatures.h382 #define X86_FEATURE_AVIC (15*32+13) /* "avic" Virtual Interrupt Controller */
/linux/arch/x86/kvm/mmu/
H A Dmmu.c4432 * using APICv/AVIC to accelerate L2 accesses to L1's APIC, in kvm_mmu_faultin_pfn()
4439 * of breaking APICv/AVIC for L1. in kvm_mmu_faultin_pfn()
4448 * when the AVIC is re-enabled. in kvm_mmu_faultin_pfn()
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv840 0x8000000a, 0, edx, 13, avic , Advanced virtual interrupt contro…

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