Searched +full:arc +full:- +full:uart (Results 1 – 15 of 15) sorted by relevance
/linux/Documentation/devicetree/bindings/serial/ |
H A D | snps,arc-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/snps,arc-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys ARC UART 10 - Vineet Gupta <vgupta@kernel.org> 13 Synopsys ARC UART is a non-standard UART used in some of the ARC FPGA boards. 16 - $ref: /schemas/serial/serial.yaml# 20 const: snps,arc-uart 28 clock-frequency: [all …]
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/linux/arch/arc/boot/dts/ |
H A D | axc001.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 14 compatible = "snps,arc"; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "simple-bus"; 20 #address-cells = <1>; 21 #size-cells = <1>; 26 #clock-cells = <0>; 27 compatible = "fixed-clock"; [all …]
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H A D | axc003_idu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 13 compatible = "snps,arc"; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 compatible = "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 24 input_clk: input-clk { 25 #clock-cells = <0>; 26 compatible = "fixed-clock"; [all …]
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H A D | axc003.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 13 compatible = "snps,arc"; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 compatible = "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 24 input_clk: input-clk { 25 #clock-cells = <0>; [all …]
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H A D | abilis_tb10x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 12 compatible = "abilis,arc-tb10x"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 28 compatible = "snps,arc-timer"; 30 interrupt-parent = <&intc>; 36 compatible = "snps,arc-timer"; 41 #address-cells = <1>; [all …]
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H A D | vdk_axc003.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 13 compatible = "snps,arc"; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 compatible = "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 25 #clock-cells = <0>; 26 compatible = "fixed-clock"; 27 clock-frequency = <50000000>; [all …]
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H A D | vdk_axc003_idu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 14 compatible = "snps,arc"; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 compatible = "simple-bus"; 20 #address-cells = <1>; 21 #size-cells = <1>; 26 #clock-cells = <0>; 27 compatible = "fixed-clock"; 28 clock-frequency = <50000000>; [all …]
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H A D | hsdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Device Tree for ARC HS Development Kit 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/reset/snps,hsdk-reset.h> 18 #address-cells = <2>; 19 #size-cells = <2>; 22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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/linux/arch/arc/plat-axs10x/ |
H A D | axs10x.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 11 #include <asm/asm-offsets.h> 14 #include <soc/arc/mcip.h> 33 * --------------------- in axs10x_enable_gpio_intc_wire() 34 * | snps,arc700-intc | in axs10x_enable_gpio_intc_wire() 35 * --------------------- in axs10x_enable_gpio_intc_wire() 37 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire() 38 * | snps,dw-apb-gpio | | snps,dw-apb-gpio | in axs10x_enable_gpio_intc_wire() 39 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire() [all …]
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/linux/include/uapi/linux/ |
H A D | serial_core.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 19 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 20 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 21 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 22 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 23 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 24 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 25 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ [all …]
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/linux/arch/arm/boot/dts/amlogic/ |
H A D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
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/linux/arch/arc/kernel/ |
H A D | entry-compact.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARCompact ISA 5 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 6 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 9 * -Userspace unaligned access emulation 12 * -traced syscall return code (r0) was not saved into pt_regs for restoring 13 * into user reg-file when traded task rets to user space. 14 * -syscalls needing arch-wrappers (mainly for passing sp as pt_regs) 15 * were not invoking post-syscall trace hook (jumping directly into 19 * -Vector table jumps (@8 bytes) converted into branches (@4 bytes) [all …]
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/linux/Documentation/admin-guide/ |
H A D | kernel-parameters.txt | 16 force -- enable ACPI if default was off 17 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 18 off -- disable ACPI if default was on 19 noirq -- do not use ACPI for IRQ routing 20 strict -- Be less tolerant of platforms that are not 22 rsdt -- prefer RSDT over (default) XSDT 23 copy_dsdt -- copy DSDT to memory 24 nocmcff -- Disable firmware first mode for corrected 28 nospcr -- disable console in ACPI SPCR table as 45 If set to vendor, prefer vendor-specific driver [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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