Searched +full:am654 +full:- +full:gpio (Results 1 – 16 of 16) sorted by relevance
/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am65-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,am654-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am64-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,am654-timer"; 18 clock-names = "fck"; 19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 20 ti,timer-pwm; 25 compatible = "ti,am654-timer"; 28 clock-names = "fck"; 29 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; 30 ti,timer-pwm; [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
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H A D | k3-am654-pcie-usb2.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/phy/phy-am654-serdes.h> 13 #include "k3-pinctrl.h" 16 assigned-clocks = <&k3_clks 153 4>, 19 assigned-clock-parents = <&k3_clks 153 8>, [all …]
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H A D | k3-am654-pcie-usb3.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/phy/phy-am654-serdes.h> 14 #include "k3-pinctrl.h" 21 num-lanes = <1>; 23 phy-names = "pcie-phy0"; [all …]
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H A D | k3-am654-base-board-rocktech-rk101-panel.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * OLDI-LCD1EVM Rocktech integrated panel and touch DT overlay for AM654-EVM. 4 * Panel Link: https://www.digimax.it/en/tft-lcd/20881-RK101II01D-CT 5 * AM654 LCD EVM: https://www.ti.com/tool/TMDSLCD1EVM 7 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 /dts-v1/; 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 18 vcc_5v0: lcd-regulator { [all …]
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H A D | k3-am65.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 16 model = "Texas Instruments K3 AM654 SoC"; 17 compatible = "ti,am654"; 18 interrupt-parent = <&gic500>; [all …]
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H A D | k3-am654-idk.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for IDK application board on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-pinctrl.h" 17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0"; 18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1"; 19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0"; [all …]
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-davinci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO controller for Davinci and keystone devices 10 - Keerthy <j-keerthy@ti.com> 15 - items: 16 - enum: 17 - ti,k2g-gpio 18 - ti,am654-gpio [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Md Danish Anwar <danishanwar@ti.com> 13 Ethernet based on the Programmable Real-Time Unit and Industrial 19 - ti,am642-icssg-prueth # for AM64x SoC family 20 - ti,am654-icssg-prueth # for AM65x SoC family 21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 32 dma-names: [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | pinctrl-single.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 21 - enum: 22 - pinctrl-single 23 - pinconf-single 24 - items: 25 - enum: [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | ti,sci-intr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lokesh Vutla <lokeshvutla@ti.com> 13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 22 +----------------------+ 24 +-------+ | +------+ +-----+ | 25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ 26 +-------+ | +------+ +-----+ | controller [all …]
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/linux/drivers/pci/controller/dwc/ |
H A D | pci-keystone.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2014 Texas Instruments., Ltd. 8 * Author: Murali Karicheri <m-karicheri2@ti.com> 9 * Implementation based on pci-exynos.c and pcie-designware.c 14 #include <linux/gpio/consumer.h> 31 #include "pcie-designware.h" 59 #define PCIE_LEGACY_IRQ_ENABLE_SET(n) (0x188 + (0x10 * ((n) - 1))) 60 #define PCIE_LEGACY_IRQ_ENABLE_CLR(n) (0x18c + (0x10 * ((n) - 1))) 84 #define ERR_NONFATAL BIT(2) /* Non-fatal error */ 110 #define to_keystone_pcie(x) dev_get_drvdata((x)->dev) [all …]
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/linux/drivers/gpio/ |
H A D | gpio-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * TI DaVinci GPIO Support 5 * Copyright (c) 2006-2007 David Brownell 9 #include <linux/gpio/driver.h> 43 #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */ 57 /* Serialize access to GPIO registers */ 66 static inline u32 __gpio_mask(unsigned gpio) in __gpio_mask() argument 68 return 1 << (gpio % 32); in __gpio_mask() 73 /*--------------------------------------------------------------------------*/ 75 /* board setup code *MUST* setup pinmux and enable the GPIO clock. */ [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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