/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | ci-hdrc-usb2.txt | 4 - compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" 13 "fsl,imx7ulp-usb" [all …]
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H A D | chipidea,usb2-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 25 clock-names: 31 power-domains: 37 reset-names: 40 "#reset-cells": 45 itc-setting: [all …]
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H A D | chipidea,usb2-imx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 15 - enum: 16 - fsl,imx27-usb 17 - items: 18 - enum: 19 - fsl,imx23-usb [all …]
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H A D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 11 - Peng Fan <peng.fan@nxp.com> 16 - enum: 17 - chipidea,usb2 18 - lsi,zevio-usb 19 - nuvoton,npcm750-udc [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a 26 - snps,dwmac-3.610 [all …]
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H A D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 22 - compatible 27 - items: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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H A D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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H A D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-axi { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <333333333>; 14 clock-output-names = "conn_axi_clk"; 17 conn_ahb_clk: clock-conn-ahb { [all …]
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H A D | imx8dxl-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /delete-node/ &enet1_lpcg; 7 /delete-node/ &fec2; 10 conn_enet0_root_clk: clock-conn-enet0-root { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <250000000>; 14 clock-output-names = "conn_enet0_root_clk"; 17 clk_dummy: clock-dummy { 18 compatible = "fixed-clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/riscv/starfive/ |
H A D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive,jh7110-crg.h> 9 #include <dt-bindings/power/starfive,jh7110-pmu.h> 10 #include <dt-bindings/reset/starfive,jh7110-crg.h> 11 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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H A D | jh7100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive-jh7100.h> 9 #include <dt-bindings/reset/starfive-jh7100.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "sifive,u74-mc", "riscv"; 23 d-cache-block-size = <64>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | qcom-msm8960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 8 #include <dt-bindings/mfd/qcom-rpm.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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/freebsd/sys/dev/dwc/ |
H A D | if_dwc.c | 1 /*- 5 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 32 * Chapter 17, Altera Cyclone V Device Handbook (CV-5V2 2014.07.22) 34 * EMAC is an instance of the Synopsys DesignWare 3504-0 82 { -1, 0 } 100 mii = sc->mii_softc; in dwc_media_status() 103 ifmr->ifm_active = mii->mii_media_active; in dwc_media_status() 104 ifmr->ifm_status = mii->mii_media_status; in dwc_media_status() 112 return (mii_mediachg(sc->mii_softc)); in dwc_media_change_locked() 140 if (!sc->link_is_up) in dwc_txstart_locked() [all …]
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/ |
H A D | sun9i-a80.dtsi | 2 * Copyright 2014 Chen-Yu Tsai 4 * Chen-Yu Tsai <wens@csie.org> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun9i-a80-ccu.h> 48 #include <dt-bindings/clock/sun9i-a80-de.h> 49 #include <dt-bindings/clock/sun9i-a80-usb.h> 50 #include <dt-bindings/reset/sun9i-a80-ccu.h> 51 #include <dt-bindings/reset/sun9i-a80-de.h> 52 #include <dt-bindings/reset/sun9i-a80-usb.h> [all …]
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/freebsd/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416reg.h | 1 /*- 2 * SPDX-License-Identifier: ISC 4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 34 #define AR_WA 0x4004 /* PCIE work-arounds */ 36 #define AR_AHB_MODE 0x4024 /* AHB mode for dma */ 120 /* RTC_DERIVED_* - only for AR9130 */ 149 #define AR_TXOP_X 0x81ec /* txop for legacy non-qos */ 154 /* generic timers based on tsf - all uS */ 187 #define AR_RC_AHB 0x00000001 /* AHB reset */ [all …]
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/freebsd/sys/arm/allwinner/ |
H A D | if_awg.c | 1 /*- 71 #define RD4(sc, reg) bus_read_4((sc)->res[_RES_EMAC], (reg)) 72 #define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_EMAC], (reg), (val)) 74 #define AWG_LOCK(sc) mtx_lock(&(sc)->mtx) 75 #define AWG_UNLOCK(sc) mtx_unlock(&(sc)->mtx); 76 #define AWG_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED) 77 #define AWG_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED) 86 #define TX_NEXT(n) (((n) + 1) & (TX_DESC_COUNT - 1)) 87 #define TX_SKIP(n, o) (((n) + (o)) & (TX_DESC_COUNT - 1)) 88 #define RX_NEXT(n) (((n) + 1) & (RX_DESC_COUNT - 1)) [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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