Lines Matching +full:ahb +full:- +full:burst +full:- +full:config
1 /*-
5 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
32 * Chapter 17, Altera Cyclone V Device Handbook (CV-5V2 2014.07.22)
34 * EMAC is an instance of the Synopsys DesignWare 3504-0
82 { -1, 0 }
100 mii = sc->mii_softc; in dwc_media_status()
103 ifmr->ifm_active = mii->mii_media_active; in dwc_media_status()
104 ifmr->ifm_status = mii->mii_media_status; in dwc_media_status()
112 return (mii_mediachg(sc->mii_softc)); in dwc_media_change_locked()
140 if (!sc->link_is_up) in dwc_txstart_locked()
143 ifp = sc->ifp; in dwc_txstart_locked()
164 if_t ifp = sc->ifp; in dwc_init_locked()
173 * to set up the remaining config registers based on current media. in dwc_init_locked()
175 mii_mediachg(sc->mii_softc); in dwc_init_locked()
185 callout_reset(&sc->dwc_callout, hz, dwc_tick, sc); in dwc_init_locked()
205 ifp = sc->ifp; in dwc_stop_locked()
207 sc->tx_watchdog_count = 0; in dwc_stop_locked()
208 sc->stats_harvest_count = 0; in dwc_stop_locked()
210 callout_stop(&sc->dwc_callout); in dwc_stop_locked()
233 flags = if_getflags(ifp) ^ sc->if_flags; in dwc_ioctl()
237 if (!sc->is_detaching) in dwc_ioctl()
244 sc->if_flags = if_getflags(ifp); in dwc_ioctl()
257 mii = sc->mii_softc; in dwc_ioctl()
258 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd); in dwc_ioctl()
261 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); in dwc_ioctl()
306 device_printf(sc->dev, in dwc_intr()
325 ifp = sc->ifp; in dwc_tick()
335 if (sc->tx_watchdog_count > 0) { in dwc_tick()
336 if (--sc->tx_watchdog_count == 0) { in dwc_tick()
345 link_was_up = sc->link_is_up; in dwc_tick()
346 mii_tick(sc->mii_softc); in dwc_tick()
347 if (sc->link_is_up && !link_was_up) in dwc_tick()
351 callout_reset(&sc->dwc_callout, hz, dwc_tick, sc); in dwc_tick()
367 * present in the ethernet-phy node. in dwc_reset_phy()
369 if (OF_getencprop(sc->node, "snps,reset-gpio", in dwc_reset_phy()
373 if (OF_getencprop(sc->node, "snps,reset-delays-us", in dwc_reset_phy()
375 device_printf(sc->dev, in dwc_reset_phy()
376 "Wrong property for snps,reset-delays-us"); in dwc_reset_phy()
382 device_printf(sc->dev, in dwc_reset_phy()
387 if (GPIO_MAP_GPIOS(gpio, sc->node, gpio_node, in dwc_reset_phy()
388 nitems(gpio_prop) - 1, in dwc_reset_phy()
390 device_printf(sc->dev, "Can't map gpio for phy reset\n"); in dwc_reset_phy()
395 if (OF_hasprop(sc->node, "snps,reset-active-low")) in dwc_reset_phy()
416 rv = clk_get_by_ofw_name(sc->dev, 0, "stmmaceth", &sc->clk_stmmaceth); in dwc_clock_init()
418 device_printf(sc->dev, "Cannot get GMAC main clock\n"); in dwc_clock_init()
421 if ((rv = clk_enable(sc->clk_stmmaceth)) != 0) { in dwc_clock_init()
422 device_printf(sc->dev, "could not enable main clock\n"); in dwc_clock_init()
427 rv = clk_get_by_ofw_name(sc->dev, 0, "pclk", &sc->clk_pclk); in dwc_clock_init()
430 if ((rv = clk_enable(sc->clk_pclk)) != 0) { in dwc_clock_init()
431 device_printf(sc->dev, "could not enable peripheral clock\n"); in dwc_clock_init()
436 clk_get_freq(sc->clk_stmmaceth, &freq); in dwc_clock_init()
437 device_printf(sc->dev, "MAC clock(%s) freq: %jd\n", in dwc_clock_init()
438 clk_get_name(sc->clk_stmmaceth), (intmax_t)freq); in dwc_clock_init()
450 rv = hwreset_get_by_ofw_name(sc->dev, 0, "stmmaceth", &sc->rst_stmmaceth); in dwc_reset_deassert()
452 device_printf(sc->dev, "Cannot get GMAC reset\n"); in dwc_reset_deassert()
455 rv = hwreset_deassert(sc->rst_stmmaceth); in dwc_reset_deassert()
457 device_printf(sc->dev, "could not de-assert GMAC reset\n"); in dwc_reset_deassert()
462 rv = hwreset_get_by_ofw_name(sc->dev, 0, "ahb", &sc->rst_ahb); in dwc_reset_deassert()
465 rv = hwreset_deassert(sc->rst_ahb); in dwc_reset_deassert()
467 device_printf(sc->dev, "could not de-assert AHB reset\n"); in dwc_reset_deassert()
502 sc->dev = dev; in dwc_attach()
503 sc->rx_idx = 0; in dwc_attach()
504 sc->tx_desccount = TX_DESC_COUNT; in dwc_attach()
505 sc->tx_mapcount = 0; in dwc_attach()
507 sc->node = ofw_bus_get_node(dev); in dwc_attach()
508 sc->phy_mode = mii_fdt_get_contype(sc->node); in dwc_attach()
509 switch (sc->phy_mode) { in dwc_attach()
522 if (OF_getencprop(sc->node, "snps,pbl", &pbl, sizeof(uint32_t)) <= 0) in dwc_attach()
524 if (OF_getencprop(sc->node, "snps,txpbl", &sc->txpbl, sizeof(uint32_t)) <= 0) in dwc_attach()
525 sc->txpbl = pbl; in dwc_attach()
526 if (OF_getencprop(sc->node, "snps,rxpbl", &sc->rxpbl, sizeof(uint32_t)) <= 0) in dwc_attach()
527 sc->rxpbl = pbl; in dwc_attach()
528 if (OF_hasprop(sc->node, "snps,no-pbl-x8") == 1) in dwc_attach()
529 sc->nopblx8 = true; in dwc_attach()
530 if (OF_hasprop(sc->node, "snps,fixed-burst") == 1) in dwc_attach()
531 sc->fixed_burst = true; in dwc_attach()
532 if (OF_hasprop(sc->node, "snps,mixed-burst") == 1) in dwc_attach()
533 sc->mixed_burst = true; in dwc_attach()
534 if (OF_hasprop(sc->node, "snps,aal") == 1) in dwc_attach()
535 sc->aal = true; in dwc_attach()
546 /* De-assert main reset */ in dwc_attach()
553 if ((sc->mii_clk = IF_DWC_MII_CLK(dev)) < 0) { in dwc_attach()
554 device_printf(dev, "Cannot get mii clock value %d\n", -sc->mii_clk); in dwc_attach()
558 if (bus_alloc_resources(dev, dwc_spec, sc->res)) { in dwc_attach()
569 bus_release_resources(dev, dwc_spec, sc->res); in dwc_attach()
575 device_printf(sc->dev, "Can't reset DMA controller.\n"); in dwc_attach()
576 bus_release_resources(sc->dev, dwc_spec, sc->res); in dwc_attach()
581 bus_release_resources(dev, dwc_spec, sc->res); in dwc_attach()
585 mtx_init(&sc->mtx, device_get_nameunit(sc->dev), in dwc_attach()
588 callout_init_mtx(&sc->dwc_callout, &sc->mtx, 0); in dwc_attach()
591 error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_NET | INTR_MPSAFE, in dwc_attach()
592 NULL, dwc_intr, sc, &sc->intr_cookie); in dwc_attach()
595 bus_release_resources(dev, dwc_spec, sc->res); in dwc_attach()
600 sc->ifp = ifp = if_alloc(IFT_ETHER); in dwc_attach()
604 if_setflags(sc->ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); in dwc_attach()
608 if_setsendqlen(ifp, TX_MAP_COUNT - 1); in dwc_attach()
609 if_setsendqready(sc->ifp); in dwc_attach()
610 if_sethwassist(sc->ifp, CSUM_IP | CSUM_UDP | CSUM_TCP); in dwc_attach()
611 if_setcapabilities(sc->ifp, IFCAP_VLAN_MTU | IFCAP_HWCSUM); in dwc_attach()
612 if_setcapenable(sc->ifp, if_getcapabilities(sc->ifp)); in dwc_attach()
615 error = mii_attach(dev, &sc->miibus, ifp, dwc_media_change, in dwc_attach()
621 bus_teardown_intr(dev, sc->res[1], sc->intr_cookie); in dwc_attach()
622 bus_release_resources(dev, dwc_spec, sc->res); in dwc_attach()
625 sc->mii_softc = device_get_softc(sc->miibus); in dwc_attach()
629 sc->is_attached = true; in dwc_attach()
646 if (sc->intr_cookie != NULL) { in dwc_detach()
647 bus_teardown_intr(dev, sc->res[1], sc->intr_cookie); in dwc_detach()
650 if (sc->is_attached) { in dwc_detach()
652 sc->is_detaching = true; in dwc_detach()
655 callout_drain(&sc->dwc_callout); in dwc_detach()
656 ether_ifdetach(sc->ifp); in dwc_detach()
664 if (sc->ifp != NULL) { in dwc_detach()
665 if_free(sc->ifp); in dwc_detach()
666 sc->ifp = NULL; in dwc_detach()
669 bus_release_resources(dev, dwc_spec, sc->res); in dwc_detach()
671 mtx_destroy(&sc->mtx); in dwc_detach()