Home
last modified time | relevance | path

Searched +full:adc +full:- +full:clk (Results 1 – 25 of 425) sorted by relevance

12345678910>>...17

/linux/drivers/iio/adc/
H A Dimx8qxp-adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NXP i.MX8QXP ADC driver
15 #include <linux/clk.h>
30 #define ADC_DRIVER_NAME "imx8qxp-adc"
46 /* ADC bit shift */
75 /* ADC PARAMETER*/
94 struct clk *clk; member
95 struct clk *ipg_clk;
97 /* Serialise ADC channel reads */
123 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
[all …]
H A Dingenic-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ADC driver for the Ingenic JZ47xx SoCs
4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
10 #include <linux/clk.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
107 struct clk *clk; member
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
[all …]
H A Dlpc18xx_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO ADC driver for NXP LPC18xx ADC
8 * - Hardware triggers
9 * - Burst mode
10 * - Interrupts
11 * - DMA
14 #include <linux/clk.h>
26 /* LPC18XX ADC registers and bits */
46 struct clk *clk; member
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
[all …]
H A Dep93xx_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ADC module on the Cirrus Logic EP93xx series of SoCs
14 #include <linux/clk.h>
28 * lower ADC conversion rate down to CONFIG_HZ, so we fallback to busy wait
31 * HR Timers-based version loads CPU only up to 10% during back to back ADC
32 * conversion, while busy wait-based version consumes whole CPU power.
46 struct clk *clk; member
89 mutex_lock(&priv->lock); in ep93xx_read_raw()
90 if (priv->lastch != channel->channel) { in ep93xx_read_raw()
91 priv->lastch = channel->channel; in ep93xx_read_raw()
[all …]
H A Dexynos_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * exynos_adc.c - Support for ADC in EXYNOS SoCs
5 * 8 ~ 10 channel, 10/12-bit ADC
19 #include <linux/clk.h>
34 #include <linux/platform_data/touchscreen-s3c2410.h>
47 /* S3C2410 ADC registers definitions */
64 /* Bit definitions for S3C2410 ADC */
127 struct clk *clk; member
128 struct clk *sclk;
148 * a wait-callback is used to wait for the conversion result,
[all …]
H A Dfsl-imx25-gcq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
6 * connected to the imx25 ADC.
9 #include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
10 #include <linux/clk.h>
13 #include <linux/mfd/imx25-tsadc.h>
23 static const char * const driver_name = "mx25-gcq";
40 struct clk *clk; member
87 regmap_read(priv->regs, MX25_ADCQ_SR, &stats); in mx25_gcq_irq()
90 regmap_set_bits(priv->regs, MX25_ADCQ_MR, in mx25_gcq_irq()
[all …]
H A Dlpc32xx_adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * lpc32xx_adc.c - Support for ADC in LPC32XX
5 * 3-channel, 10-bit ADC
10 #include <linux/clk.h>
46 #define LPC32XXAD_NAME "lpc32xx-adc"
50 struct clk *clk; member
70 mutex_lock(&st->lock); in lpc32xx_read_raw()
71 ret = clk_prepare_enable(st->clk); in lpc32xx_read_raw()
73 mutex_unlock(&st->lock); in lpc32xx_read_raw()
77 __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | in lpc32xx_read_raw()
[all …]
H A Daspeed_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Aspeed AST2400/2500/2600 ADC
8 * ADC clock formula:
15 #include <linux/clk.h>
16 #include <linux/clk-provider.h>
45 * hardware logic in each version of ADC.
79 * When the sampling rate is too high, the ADC may not have enough charging
184 dev_warn(data->dev, "Couldn't find syscon node\n"); in aspeed_adc_set_trim_data()
185 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
190 dev_warn(data->dev, "Failed to get syscon regmap\n"); in aspeed_adc_set_trim_data()
[all …]
H A Dstm32-adc-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
13 #include <linux/clk.h>
30 #include "stm32-adc-core.h"
46 * struct stm32_adc_common_regs - stm32 common registers
51 * @ier: interrupt enable register offset for each adc
66 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
70 * @ipid: adc identification number
[all …]
H A Dvf610_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale Vybrid vf610 ADC driver
18 #include <linux/clk.h>
31 #define DRIVER_NAME "vf610-adc"
33 /* Vybrid/IMX ADC registers */
158 struct clk *clk; member
185 struct vf610_adc_feature *adc_feature = &info->adc_feature; in vf610_adc_calculate_rates()
186 unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk); in vf610_adc_calculate_rates()
190 adck_rate = info->max_adck_rate[adc_feature->conv_mode]; in vf610_adc_calculate_rates()
193 /* calculate clk divider which is within specification */ in vf610_adc_calculate_rates()
[all …]
H A Dimx7d_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale i.MX7D ADC driver
8 #include <linux/clk.h>
24 /* ADC register */
111 struct clk *clk; member
181 info->adc_feature.clk_pre_div = IMX7D_ADC_ANALOG_CLK_PRE_DIV_4; in imx7d_adc_feature_config()
182 info->adc_feature.avg_num = IMX7D_ADC_AVERAGE_NUM_32; in imx7d_adc_feature_config()
183 info->adc_feature.core_time_unit = 1; in imx7d_adc_feature_config()
188 struct imx7d_adc_feature *adc_feature = &info->adc_feature; in imx7d_adc_sample_rate_set()
200 readl(info->regs + i * IMX7D_EACH_CHANNEL_REG_OFFSET); in imx7d_adc_sample_rate_set()
[all …]
H A Dat91_adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the ADC present in the Atmel AT91 evaluation boards.
11 #include <linux/clk.h>
38 #define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
39 #define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
103 #define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
137 (st->registers->channel_base + (ch * 4))
139 (readl_relaxed(st->reg_base + reg))
141 (writel_relaxed(val, st->reg_base + reg))
161 * struct at91_adc_trigger - description of triggers
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
[all …]
H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 ADC
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
19 Each STM32 ADC block can have up to 3 ADC instances.
[all …]
H A Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP IMX8QXP ADC
10 - Cai Huoqing <caihuoqing@baidu.com>
13 Supports the ADC found on the IMX8QXP SoC.
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
[all …]
H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
17 The communication with ADC chip is via the SPI bus (mode 1).
24 - ti,ads131e04
[all …]
/linux/drivers/mfd/
H A Dfsl-imx25-tsadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
6 #include <linux/clk.h>
12 #include <linux/mfd/imx25-tsadc.h>
35 regmap_read(tsadc->regs, MX25_TSC_TGSR, &status); in mx25_tsadc_irq_handler()
38 generic_handle_domain_irq(tsadc->domain, 1); in mx25_tsadc_irq_handler()
41 generic_handle_domain_irq(tsadc->domain, 0); in mx25_tsadc_irq_handler()
49 struct mx25_tsadc *tsadc = d->host_data; in mx25_tsadc_domain_map()
67 struct device *dev = &pdev->dev; in mx25_tsadc_setup_irq()
68 struct device_node *np = dev->of_node; in mx25_tsadc_setup_irq()
[all …]
H A Dti_am335x_tscadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI Touch Screen / ADC MFD driver
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
12 #include <linux/clk.h>
33 spin_lock_irqsave(&tscadc->reg_lock, flags); in am335x_tsc_se_set_cache()
34 tscadc->reg_se_cache |= val; in am335x_tsc_se_set_cache()
35 if (tscadc->adc_waiting) in am335x_tsc_se_set_cache()
36 wake_up(&tscadc->reg_se_wait); in am335x_tsc_se_set_cache()
37 else if (!tscadc->adc_in_use) in am335x_tsc_se_set_cache()
38 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); in am335x_tsc_se_set_cache()
[all …]
/linux/sound/soc/sunxi/
H A Dsun8i-codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * (C) Copyright 2010-2016
9 * Mylène Josserand <mylene.josserand@free-electrons.com>
14 #include <linux/clk.h>
27 #include <sound/soc-dapm.h>
227 struct clk *clk_bus;
228 struct clk *clk_module;
251 if (scodec->clk_bus) { in sun8i_codec_runtime_resume()
252 ret = clk_prepare_enable(scodec->clk_bus); in sun8i_codec_runtime_resume()
259 regcache_cache_only(scodec->regmap, false); in sun8i_codec_runtime_resume()
[all …]
/linux/sound/soc/codecs/
H A Drt5514.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5514.c -- RT5514 ALSA SoC audio codec driver
24 #include <sound/soc-dapm.h>
31 #include "rt5514-spi.h"
120 regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec); in rt5514_enable_dsp_prepare()
122 regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604); in rt5514_enable_dsp_prepare()
124 regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001); in rt5514_enable_dsp_prepare()
125 /* mini-core reset */ in rt5514_enable_dsp_prepare()
126 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b); in rt5514_enable_dsp_prepare()
127 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149); in rt5514_enable_dsp_prepare()
[all …]
H A Des8328.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8328.c -- ES8328 ALSA SoC Audio driver
5 * Copyright 2014 Sutajio Ko-Usagi PTE LTD
10 #include <linux/clk.h>
80 struct clk *clk; member
99 static const DECLARE_TLV_DB_SCALE(play_tlv, -3000, 100, 0);
100 static const DECLARE_TLV_DB_SCALE(dac_adc_tlv, -9600, 50, 0);
101 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
123 if (es8328->deemph) { in es8328_set_deemph()
126 if (abs(deemph_settings[i].rate - es8328->playback_fs) < in es8328_set_deemph()
[all …]
H A Djz4725b.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/clk.h>
163 struct clk *clk; member
167 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_dac_tlv, -2250, 150, 0);
169 0, 11, TLV_DB_SCALE_ITEM(-2250, 0, 0),
170 12, 31, TLV_DB_SCALE_ITEM(-2250, 150, 0),
174 0, 11, TLV_DB_SCALE_ITEM(-3350, 200, 0),
175 12, 23, TLV_DB_SCALE_ITEM(-1050, 100, 0),
228 SOC_SINGLE("High-Pass Filter Capture Switch",
251 SOC_DAPM_ENUM("ADC Source Capture Route", jz4725b_codec_adc_src_enum);
[all …]
H A Duda1380.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
5 * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
65 u16 *cache = uda1380->reg_cache; in uda1380_read_reg_cache()
70 return -1; in uda1380_read_reg_cache()
81 u16 *cache = uda1380->reg_cache; in uda1380_write_reg_cache()
86 set_bit(reg - 0x10, &uda1380_cache_dirty); in uda1380_write_reg_cache()
116 if (i2c_master_send(uda1380->i2c, data, 3) == 3) { in uda1380_write()
118 i2c_master_send(uda1380->i2c, data, 1); in uda1380_write()
119 i2c_master_recv(uda1380->i2c, data, 2); in uda1380_write()
[all …]
H A Dadau1373.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
24 #include "adau-utils.h"
323 0, 7, TLV_DB_SCALE_ITEM(-7900, 400, 1),
324 8, 15, TLV_DB_SCALE_ITEM(-4700, 300, 0),
325 16, 23, TLV_DB_SCALE_ITEM(-2300, 200, 0),
326 24, 31, TLV_DB_SCALE_ITEM(-700, 100, 0)
329 static const DECLARE_TLV_DB_MINMAX(adau1373_digital_tlv, -9563, 0);
330 static const DECLARE_TLV_DB_SCALE(adau1373_in_pga_tlv, -1300, 100, 1);
331 static const DECLARE_TLV_DB_SCALE(adau1373_ep_tlv, -600, 600, 1);
[all …]
H A Dtlv320aic32x4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Javier Martin <javier.martin@vista-silicon.com>
21 #include <linux/clk.h>
30 #include <sound/soc-dapm.h>
59 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in aic32x4_reset_adc()
64 * sequence but experiments show the ADC needs to be reset after each in aic32x4_reset_adc()
81 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in mic_bias_event()
112 ucontrol->value.integer.value[0] = (val & 0x01); in aic32x4_get_mfp1_gpio()
129 return -EINVAL; in aic32x4_set_mfp2_gpio()
132 if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP2_GPIO_OUT_HIGH)) in aic32x4_set_mfp2_gpio()
[all …]

12345678910>>...17