| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | amlogic-t7-a311d2-khadas-vim4.dts | 41 xtal: xtal-clk { label
44 clock-output-names = "xtal";
52 clocks = <&xtal>, <&xtal>, <&xtal>;
53 clock-names = "xtal", "pclk", "baud";
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| H A D | amlogic-a4-common.dtsi | 23 xtal: xtal-clk { label
26 clock-output-names = "xtal";
58 clocks = <&xtal>;
66 clocks = <&xtal>, <&xtal>, <&xtal>;
67 clock-names = "xtal", "pclk", "baud";
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| H A D | amlogic-s7d.dtsi | 69 xtal: xtal-clk { label
72 clock-output-names = "xtal";
104 clocks = <&xtal>, <&xtal>, <&xtal>;
105 clock-names = "xtal", "pclk", "baud";
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| H A D | amlogic-s6.dtsi | 67 xtal: xtal-clk { label
70 clock-output-names = "xtal";
102 clocks = <&xtal>, <&xtal>, <&xtal>;
103 clock-names = "xtal", "pclk", "baud";
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| H A D | amlogic-s7.dtsi | 105 xtal: xtal-clk { label
108 clock-output-names = "xtal";
140 clocks = <&xtal>, <&xtal>, <&xtal>;
141 clock-names = "xtal", "pclk", "baud";
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| /linux/drivers/clk/pistachio/ |
| H A D | clk-pistachio.c | 70 DIV(CLK_RPU_SLEEP_DIV, "rpu_sleep_div", "xtal", 0x224, 10),
105 PNAME(mux_xtal_audio_refclk) = { "xtal", "audio_clk_in_gate" };
106 PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
107 PNAME(mux_xtal_audio) = { "xtal", "audio_pll", "audio_in" };
109 PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
110 PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
112 PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
113 PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
114 PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
117 PNAME(mux_xtal_sys) = { "xtal", "sys_pll" };
[all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | cxd2841er.c | 60 enum cxd2841er_xtal xtal; member
312 static u32 cxd2841er_calc_iffreq_xtal(enum cxd2841er_xtal xtal, u32 ifhz) in cxd2841er_calc_iffreq_xtal() argument
315 (xtal == SONY_XTAL_24000) ? 48000000 : 41000000); in cxd2841er_calc_iffreq_xtal()
788 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_s()
801 dev_dbg(&priv->i2c->dev, "%s(): invalid demod xtal %d\n", in cxd2841er_shutdown_to_sleep_s()
802 __func__, priv->xtal); in cxd2841er_shutdown_to_sleep_s()
850 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_tc()
2119 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x0E:0x0C; in cxd2841er_dvbt2_set_profile()
2124 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
2129 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
[all …]
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| /linux/drivers/clk/ralink/ |
| H A D | clk-mtmips.c | 172 { CLK_PERIPH("480000.wmac", "xtal") }
185 { CLK_PERIPH("10180000.wmac", "xtal") }
198 { CLK_PERIPH("10180000.wmac", "xtal") }
211 { CLK_PERIPH("10180000.wmac", "xtal") }
225 { CLK_PERIPH("10300000.wmac", "xtal") }
269 CLK_FIXED("periph", "xtal", 40000000)
273 CLK_FIXED("periph", "xtal", 40000000)
277 CLK_FIXED("bbppll", "xtal", 480000000)
281 CLK_FIXED("bbppll", "xtal", 480000000),
283 CLK_FIXED("periph", "xtal", 40000000)
[all …]
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| /linux/arch/arm/boot/dts/amlogic/ |
| H A D | meson8.dtsi | 256 clocks = <&xtal>;
257 clock-names = "xtal";
453 clocks = <&xtal>,
601 xtal_32k_out_pins: xtal-32k-out {
604 function = "xtal";
650 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
651 clock-names = "xtal", "ddr_pll";
725 clocks = <&xtal>,
733 clocks = <&xtal>,
746 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
[all …]
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| H A D | meson8b.dtsi | 233 clocks = <&xtal>;
234 clock-names = "xtal";
408 clocks = <&xtal>,
593 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
594 clock-names = "xtal", "ddr_pll";
682 clocks = <&xtal>,
690 clocks = <&xtal>,
703 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
712 clocks = <&xtal>,
734 clocks = <&xtal>, <&clkc CLKID_CLK81>;
[all …]
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | amlogic,meson-uart.yaml | 73 - description: external xtal clock identifier
75 - description: the source of the baudrate generator, can be either the xtal or the pclk
79 - const: xtal
103 clocks = <&xtal>, <&pclk>, <&xtal>;
104 clock-names = "xtal", "pclk", "baud";
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| /linux/Documentation/devicetree/bindings/soc/amlogic/ |
| H A D | amlogic,meson-gx-hhi-sysctrl.yaml | 125 clocks = <&xtal>;
126 clock-names = "xtal";
170 clocks = <&xtal>, <&clk81>;
171 clock-names = "xtal", "mpeg-clk";
184 clocks = <&xtal>;
185 clock-names = "xtal";
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | silabs,si5351.yaml | 50 - const: xtal
62 - description: PLL source, XTAL (0) or CLKIN (1, Si5351C only).
106 2 - use XTAL for this output
212 /* Connect XTAL input to 25MHz reference */
214 clock-names = "xtal";
216 /* Use XTAL input as source of PLL0 and PLL1 */
258 * - XTAL as clock source of output divider
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| H A D | marvell,armada-3700-uart-clock.yaml | 23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
28 used for UART (most probably xtal) for smooth boot log on UART.
36 - const: xtal
57 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
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| H A D | amlogic,s4-pll-clkc.yaml | 25 - const: xtal
44 clocks = <&xtal>;
45 clock-names = "xtal";
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| H A D | amlogic,meson8-ddr-clkc.yaml | 26 - const: xtal
45 clocks = <&xtal>;
46 clock-names = "xtal";
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| H A D | nxp,lpc3220-clk.yaml | 32 - const: xtal
49 clocks = <&xtal_32k>, <&xtal>;
50 clock-names = "xtal_32k", "xtal";
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| /linux/drivers/clk/renesas/ |
| H A D | rcar-usb2-clock-sel.c | 40 bool xtal; member
49 priv->extal, priv->xtal, val); in usb2_clock_sel_enable_extal_only()
51 if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY) in usb2_clock_sel_enable_extal_only()
57 if (priv->extal && !priv->xtal) in usb2_clock_sel_disable_extal_only()
169 priv->xtal = !!clk_get_rate(clk); in rcar_usb2_clock_sel_probe()
173 if (!priv->extal && !priv->xtal) { in rcar_usb2_clock_sel_probe()
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| /linux/drivers/phy/ralink/ |
| H A D | phy-mt7621-pci.c | 70 * @sys_clk: pointer to the system XTAL clock
127 /* Debug Xtal Type */ in mt7621_set_phy_for_ssc()
142 if (clk_rate == 40000000) { /* 40MHz Xtal */ in mt7621_set_phy_for_ssc()
147 dev_dbg(dev, "Xtal is 40MHz\n"); in mt7621_set_phy_for_ssc()
174 dev_dbg(dev, "Xtal is 25MHz\n"); in mt7621_set_phy_for_ssc()
175 } else { /* 20MHz Xtal */ in mt7621_set_phy_for_ssc()
179 dev_dbg(dev, "Xtal is 20MHz\n"); in mt7621_set_phy_for_ssc()
199 if (clk_rate == 40000000) { /* 40MHz Xtal */ in mt7621_set_phy_for_ssc()
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| /linux/drivers/clk/mvebu/ |
| H A D | armada-37xx-xtal.c | 3 * Marvell Armada 37xx SoC xtal clocks
22 const char *xtal_name = "xtal"; in armada_3700_xtal_clock_probe()
74 { .compatible = "marvell,armada-3700-xtal-clock", },
82 .name = "marvell-armada-3700-xtal-clock",
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| /linux/drivers/clk/mxs/ |
| H A D | clk-imx23.c | 26 #define XTAL (CLKCTRL + 0x0050) macro
140 clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); in mx23_clocks_init()
141 clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28); in mx23_clocks_init()
142 clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); in mx23_clocks_init()
143 clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30); in mx23_clocks_init()
144 clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); in mx23_clocks_init()
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | amlogic,meson6-timer.yaml | 29 - const: xtal
52 clocks = <&xtal>, <&clk81>;
53 clock-names = "xtal", "pclk";
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| /linux/Documentation/devicetree/bindings/net/ieee802154/ |
| H A D | atmel,at86rf233.yaml | 35 xtal-trim:
39 Fine tuning the internal capacitance arrays of xtal pins:
64 xtal-trim = /bits/ 8 <0x06>;
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | amlogic,g12a-usb2-phy.yaml | 27 - const: xtal
76 clocks = <&xtal>;
77 clock-names = "xtal";
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| /linux/drivers/clk/ |
| H A D | clk-si5351.h | 154 * @SI5351_VARIANT_A: Si5351A (8 output clocks, XTAL input)
155 * @SI5351_VARIANT_A3: Si5351A MSOP10 (3 output clocks, XTAL input)
156 * @SI5351_VARIANT_B: Si5351B (8 output clocks, XTAL/VXCO input)
157 * @SI5351_VARIANT_C: Si5351C (8 output clocks, XTAL/CLKIN input)
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