xref: /linux/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2025 Amlogic, Inc. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11	cpus {
12		#address-cells = <2>;
13		#size-cells = <0>;
14
15		cpu0: cpu@0 {
16			device_type = "cpu";
17			compatible = "arm,cortex-a55";
18			reg = <0x0 0x0>;
19			enable-method = "psci";
20		};
21
22		cpu1: cpu@100 {
23			device_type = "cpu";
24			compatible = "arm,cortex-a55";
25			reg = <0x0 0x100>;
26			enable-method = "psci";
27		};
28
29		cpu2: cpu@200 {
30			device_type = "cpu";
31			compatible = "arm,cortex-a55";
32			reg = <0x0 0x200>;
33			enable-method = "psci";
34		};
35
36		cpu3: cpu@300 {
37			device_type = "cpu";
38			compatible = "arm,cortex-a55";
39			reg = <0x0 0x300>;
40			enable-method = "psci";
41		};
42
43	};
44
45	timer {
46		compatible = "arm,armv8-timer";
47		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
48			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
49			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
50			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
51	};
52
53	psci {
54		compatible = "arm,psci-1.0";
55		method = "smc";
56	};
57
58	xtal: xtal-clk {
59		compatible = "fixed-clock";
60		clock-frequency = <24000000>;
61		clock-output-names = "xtal";
62		#clock-cells = <0>;
63	};
64
65	soc {
66		compatible = "simple-bus";
67		#address-cells = <2>;
68		#size-cells = <2>;
69		ranges;
70
71		gic: interrupt-controller@fff01000 {
72			compatible = "arm,gic-400";
73			#interrupt-cells = <3>;
74			#address-cells = <0>;
75			interrupt-controller;
76			reg = <0x0 0xfff01000 0 0x1000>,
77			      <0x0 0xfff02000 0 0x0100>;
78			interrupts = <GIC_PPI 9 0xf04>;
79		};
80
81		apb: bus@fe000000 {
82			compatible = "simple-bus";
83			reg = <0x0 0xfe000000 0x0 0x480000>;
84			#address-cells = <2>;
85			#size-cells = <2>;
86			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
87
88			uart_b: serial@7a000 {
89				compatible = "amlogic,s7-uart",
90					     "amlogic,meson-s4-uart";
91				reg = <0x0 0x7a000 0x0 0x18>;
92				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
93				clocks = <&xtal>, <&xtal>, <&xtal>;
94				clock-names = "xtal", "pclk", "baud";
95				status = "disabled";
96			};
97		};
98	};
99};
100