xref: /linux/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2025 Amlogic, Inc. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/gpio/gpio.h>
9/ {
10	cpus {
11		#address-cells = <2>;
12		#size-cells = <0>;
13
14		cpu0: cpu@0 {
15			device_type = "cpu";
16			compatible = "arm,cortex-a510";
17			reg = <0x0 0x0>;
18			enable-method = "psci";
19		};
20
21		cpu1: cpu@100 {
22			device_type = "cpu";
23			compatible = "arm,cortex-a510";
24			reg = <0x0 0x100>;
25			enable-method = "psci";
26		};
27
28		cpu2: cpu@200 {
29			device_type = "cpu";
30			compatible = "arm,cortex-a510";
31			reg = <0x0 0x200>;
32			enable-method = "psci";
33		};
34
35		cpu3: cpu@300 {
36			device_type = "cpu";
37			compatible = "arm,cortex-a510";
38			reg = <0x0 0x300>;
39			enable-method = "psci";
40		};
41	};
42
43	timer {
44		compatible = "arm,armv8-timer";
45		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
46			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
47			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
48			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
49	};
50
51	psci {
52		compatible = "arm,psci-1.0";
53		method = "smc";
54	};
55
56	xtal: xtal-clk {
57		compatible = "fixed-clock";
58		clock-frequency = <24000000>;
59		clock-output-names = "xtal";
60		#clock-cells = <0>;
61	};
62
63	soc {
64		compatible = "simple-bus";
65		#address-cells = <2>;
66		#size-cells = <2>;
67		ranges;
68
69		gic: interrupt-controller@ff200000 {
70			compatible = "arm,gic-v3";
71			#interrupt-cells = <3>;
72			#address-cells = <0>;
73			interrupt-controller;
74			reg = <0x0 0xff200000 0 0x10000>,
75			      <0x0 0xff240000 0 0x80000>;
76			interrupts = <GIC_PPI 9 0xf04>;
77		};
78
79		apb: bus@fe000000 {
80			compatible = "simple-bus";
81			reg = <0x0 0xfe000000 0x0 0x480000>;
82			#address-cells = <2>;
83			#size-cells = <2>;
84			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
85
86			uart_b: serial@7a000 {
87				compatible = "amlogic,s6-uart",
88					     "amlogic,meson-s4-uart";
89				reg = <0x0 0x7a000 0x0 0x18>;
90				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
91				clocks = <&xtal>, <&xtal>, <&xtal>;
92				clock-names = "xtal", "pclk", "baud";
93				status = "disabled";
94			};
95		};
96	};
97};
98