Home
last modified time | relevance | path

Searched full:ve (Results 1 – 25 of 2325) sorted by relevance

12345678910>>...93

/freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp1 //===- VEDisassembler.cpp - Disassembler for VE -----------------*- C++ -*-===//
9 // This file is part of the VE Disassembler.
15 #include "VE.h"
25 #define DEBUG_TYPE "ve-disassembler"
31 /// A disassembler class for VE.
57 VE::SW0, VE::SW1, VE::SW2, VE::SW3, VE::SW4, VE::SW5, VE::SW6,
58 VE::SW7, VE::SW8, VE::SW9, VE::SW10, VE::SW11, VE::SW12, VE::SW13,
59 VE::SW14, VE::SW15, VE::SW16, VE::SW17, VE::SW18, VE::SW19, VE::SW20,
60 VE::SW21, VE::SW22, VE::SW23, VE::SW24, VE::SW25, VE::SW26, VE::SW27,
61 VE::SW28, VE::SW29, VE::SW30, VE::SW31, VE::SW32, VE::SW33, VE::SW34,
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsVEVL.gen.td1 let TargetPrefix = "ve" in def int_ve_vl_vld_vssl : ClangBuiltin<"__builtin_ve_vl_vld_vssl">, Intri…
2 let TargetPrefix = "ve" in def int_ve_vl_vld_vssvl : ClangBuiltin<"__builtin_ve_vl_vld_vssvl">, Int…
3 let TargetPrefix = "ve" in def int_ve_vl_vldnc_vssl : ClangBuiltin<"__builtin_ve_vl_vldnc_vssl">, I…
4 let TargetPrefix = "ve" in def int_ve_vl_vldnc_vssvl : ClangBuiltin<"__builtin_ve_vl_vldnc_vssvl">,…
5 let TargetPrefix = "ve" in def int_ve_vl_vldu_vssl : ClangBuiltin<"__builtin_ve_vl_vldu_vssl">, Int…
6 let TargetPrefix = "ve" in def int_ve_vl_vldu_vssvl : ClangBuiltin<"__builtin_ve_vl_vldu_vssvl">, I…
7 let TargetPrefix = "ve" in def int_ve_vl_vldunc_vssl : ClangBuiltin<"__builtin_ve_vl_vldunc_vssl">,…
8 let TargetPrefix = "ve" in def int_ve_vl_vldunc_vssvl : ClangBuiltin<"__builtin_ve_vl_vldunc_vssvl"…
9 let TargetPrefix = "ve" in def int_ve_vl_vldlsx_vssl : ClangBuiltin<"__builtin_ve_vl_vldlsx_vssl">,…
10 let TargetPrefix = "ve" in def int_ve_vl_vldlsx_vssvl : ClangBuiltin<"__builtin_ve_vl_vldlsx_vssvl"…
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/
H A DVEAsmParser.cpp1 //===-- VEAsmParser.cpp - Parse VE assembly to MCInst instructions --------===//
12 #include "VE.h"
36 #define DEBUG_TYPE "ve-asmparser"
69 // Custom parse functions for VE specific operands.
102 VE::SW0, VE::SW1, VE::SW2, VE::SW3, VE::SW4, VE::SW5, VE::SW6,
103 VE::SW7, VE::SW8, VE::SW9, VE::SW10, VE::SW11, VE::SW12, VE::SW13,
104 VE::SW14, VE::SW15, VE::SW16, VE::SW17, VE::SW18, VE::SW19, VE::SW20,
105 VE::SW21, VE::SW22, VE::SW23, VE::SW24, VE::SW25, VE::SW26, VE::SW27,
106 VE::SW28, VE::SW29, VE::SW30, VE::SW31, VE::SW32, VE::SW33, VE::SW34,
107 VE::SW35, VE::SW36, VE::SW37, VE::SW38, VE::SW39, VE::SW40, VE::SW41,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp1 //===-- VEInstrInfo.cpp - VE Instruction Information ----------------------===//
9 // This file contains the VE implementation of the TargetInstrInfo class.
14 #include "VE.h"
28 #define DEBUG_TYPE "ve-instr-info"
39 : VEGenInstrInfo(VE::ADJCALLSTACKDOWN, VE::ADJCALLSTACKUP), RI() {} in VEInstrInfo()
98 using namespace llvm::VE; in isUncondBranchOpcode()
101 // VE has other branch relative always instructions for word/double/float, in isUncondBranchOpcode()
113 using namespace llvm::VE; in isCondBranchOpcode()
125 using namespace llvm::VE; in isIndirectBranchOpcode()
129 // VE has other branch always instructions for word/double/float, but in isIndirectBranchOpcode()
[all …]
H A DVERegisterInfo.cpp1 //===-- VERegisterInfo.cpp - VE Register Information ----------------------===//
9 // This file contains the VE implementation of the TargetRegisterInfo class.
14 #include "VE.h"
30 #define DEBUG_TYPE "ve-register-info"
35 // VE uses %s10 == %lp to keep return address
36 VERegisterInfo::VERegisterInfo() : VEGenRegisterInfo(VE::SX10) {} in VERegisterInfo()
70 VE::SX8, // Stack limit in getReservedRegs()
71 VE::SX9, // Frame pointer in getReservedRegs()
72 VE::SX10, // Link register (return address) in getReservedRegs()
73 VE::SX11, // Stack pointer in getReservedRegs()
[all …]
H A DVEFrameLowering.h1 //===-- VEFrameLowering.h - Define frame lowering for VE --*- C++ -*-===//
9 // This class implements VE-specific bits of TargetFrameLowering class.
16 #include "VE.h"
46 // VE reserves argument space always for call sites in the function
60 {VE::SX17, 40}, {VE::SX18, 48}, {VE::SX19, 56}, {VE::SX20, 64}, in getCalleeSavedSpillSlots()
61 {VE::SX21, 72}, {VE::SX22, 80}, {VE::SX23, 88}, {VE::SX24, 96}, in getCalleeSavedSpillSlots()
62 {VE::SX25, 104}, {VE::SX26, 112}, {VE::SX27, 120}, {VE::SX28, 128}, in getCalleeSavedSpillSlots()
63 {VE::SX29, 136}, {VE::SX30, 144}, {VE::SX31, 152}, {VE::SX32, 160}, in getCalleeSavedSpillSlots()
64 {VE::SX33, 168}}; in getCalleeSavedSpillSlots()
H A DVEFrameLowering.cpp1 //===-- VEFrameLowering.cpp - VE Frame Information ------------------------===//
9 // This file contains the VE implementation of TargetFrameLowering class.
11 // On VE, stack frames are structured as follows:
33 // VE doesn't use on demand stack allocation, so user code generated by LLVM
34 // needs to call VEOS to allocate stack frame. VE's ABI want to reduce the
89 // In addition, VE ABI defines RSA frame, return address, and frame pointer
108 // NOTE: This description is based on VE ABI and description in
152 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
153 .addReg(VE::SX11) in emitPrologueInsns()
156 .addReg(VE::SX9); in emitPrologueInsns()
[all …]
H A DVEISelLowering.cpp1 //===-- VEISelLowering.cpp - VE DAG Lowering Implementation ---------------===//
9 // This file implements the interfaces that VE uses to lower LLVM code into a
39 #define DEBUG_TYPE "ve-lower"
85 addRegisterClass(MVT::i32, &VE::I32RegClass); in initRegisterClasses()
86 addRegisterClass(MVT::i64, &VE::I64RegClass); in initRegisterClasses()
87 addRegisterClass(MVT::f32, &VE::F32RegClass); in initRegisterClasses()
88 addRegisterClass(MVT::f64, &VE::I64RegClass); in initRegisterClasses()
89 addRegisterClass(MVT::f128, &VE::F128RegClass); in initRegisterClasses()
93 addRegisterClass(VecVT, &VE::V64RegClass); in initRegisterClasses()
94 addRegisterClass(MVT::v256i1, &VE::VMRegClass); in initRegisterClasses()
[all …]
H A DVEAsmPrinter.cpp1 //===-- VEAsmPrinter.cpp - VE LLVM assembly writer ------------------------===//
10 // of machine-dependent LLVM code to GAS-format VE assembly language.
18 #include "VE.h"
37 #define DEBUG_TYPE "ve-asmprinter"
49 StringRef getPassName() const override { return "VE Assembly Printer"; } in getPassName()
88 SICInst.setOpcode(VE::SIC); in emitSIC()
96 BSICInst.setOpcode(VE::BSICrii); in emitBSIC()
108 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi()
120 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi()
132 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii()
[all …]
H A DVERegisterInfo.td1 //===-- VERegisterInfo.td - VE Register defs ---------------*- tablegen -*-===//
10 // Declarations that describe the VE register file
18 let Namespace = "VE";
26 let Namespace = "VE";
34 let Namespace = "VE";
44 let Namespace = "VE";
49 let Namespace = "VE" in {
77 def MISC : RegisterClass<"VE", [i64], 64,
95 def VLS : RegisterClass<"VE", [i32], 64, (add VL)>;
173 def I32 : RegisterClass<"VE", [i32], 32,
[all …]
H A DVETargetMachine.cpp1 //===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===//
14 #include "VE.h"
26 #define DEBUG_TYPE "ve"
37 // Aurora VE is little endian in computeDataLayout()
46 // VE supports 32 bit and 64 bits integer on registers in computeDataLayout()
85 /// Create an Aurora VE architecture model
115 /// VE Code Generator Pass Configuration Options.
136 // VE requires atomic expand pass. in addIRPasses()
H A DVEISelLowering.h1 //===-- VEISelLowering.h - VE DAG Lowering Interface ------------*- C++ -*-===//
9 // This file defines the interfaces that VE uses to lower LLVM code into a
17 #include "VE.h"
68 /// Convert a DAG integer condition code to a VE ICC condition.
96 /// Convert a DAG floating point condition code to a VE FCC condition.
152 // Immediate value of float place places at higher bits on VE.
202 // VE uses release consistency, so need fence for each atomics.
227 // VE doesn't need getPICJumpTableRelocBaseExpr since it is used for only
331 // SX-Aurora VE's s/udiv is 5-9 times slower than multiply.
333 // VE does
[all...]
H A DVEISelDAGToDAG.cpp1 //===-- VEISelDAGToDAG.cpp - A dag to dag inst selector for VE ------------===//
9 // This file defines an instruction selector for the VE target.
13 #include "VE.h"
23 #define DEBUG_TYPE "ve-isel"
24 #define PASS_NAME "VE DAG->DAG Pattern Instruction Selection"
27 /// VEDAGToDAGISel - VE specific code to select VE machine
32 /// Subtarget - Keep a pointer to the VE Subtarget around so that we can
286 New = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), SDLoc(N), VE::VM0, in Select()
289 New = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), SDLoc(N), VE::VMP0, in Select()
318 // Try to match ADDRri since reg+imm style is safe for all VE instructions in SelectInlineAsmMemoryOperand()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/
H A DVEAsmBackend.cpp1 //===-- VEAsmBackend.cpp - VE Assembler Backend ---------------------------===//
36 case VE::fixup_ve_hi32: in adjustFixupValue()
37 case VE::fixup_ve_pc_hi32: in adjustFixupValue()
38 case VE::fixup_ve_got_hi32: in adjustFixupValue()
39 case VE::fixup_ve_gotoff_hi32: in adjustFixupValue()
40 case VE::fixup_ve_plt_hi32: in adjustFixupValue()
41 case VE::fixup_ve_tls_gd_hi32: in adjustFixupValue()
42 case VE::fixup_ve_tpoff_hi32: in adjustFixupValue()
44 case VE::fixup_ve_reflong: in adjustFixupValue()
45 case VE::fixup_ve_srel32: in adjustFixupValue()
[all …]
H A DVEELFObjectWriter.cpp1 //===-- VEELFObjectWriter.cpp - VE ELF Writer -----------------------------===//
70 case VE::fixup_ve_reflong: in getRelocType()
71 case VE::fixup_ve_srel32: in getRelocType()
73 case VE::fixup_ve_pc_hi32: in getRelocType()
75 case VE::fixup_ve_pc_lo32: in getRelocType()
94 case VE::fixup_ve_reflong: in getRelocType()
96 case VE::fixup_ve_srel32: in getRelocType()
100 case VE::fixup_ve_hi32: in getRelocType()
102 case VE::fixup_ve_lo32: in getRelocType()
104 case VE in getRelocType()
[all...]
H A DVEMCExpr.cpp1 //===-- VEMCExpr.cpp - VE specific MC expression classes ------------------===//
10 // accepted by the VE architecture (e.g. "%hi", "%lo", ...).
139 VE::Fixups VEMCExpr::getFixupKind(VEMCExpr::VariantKind Kind) { in getFixupKind()
144 return VE::fixup_ve_reflong; in getFixupKind()
146 return VE::fixup_ve_hi32; in getFixupKind()
148 return VE::fixup_ve_lo32; in getFixupKind()
150 return VE::fixup_ve_pc_hi32; in getFixupKind()
152 return VE::fixup_ve_pc_lo32; in getFixupKind()
154 return VE::fixup_ve_got_hi32; in getFixupKind()
156 return VE::fixup_ve_got_lo32; in getFixupKind()
[all …]
/freebsd/bin/ps/
H A Dprint.c94 arguments(KINFO *k, VARENT *ve) in arguments() argument
102 if (STAILQ_NEXT(ve, next_ve) != NULL && strlen(vis_args) > ARGUMENTS_WIDTH) in arguments()
109 command(KINFO *k, VARENT *ve) in command() argument
115 if (STAILQ_NEXT(ve, next_ve) == NULL) { in command()
131 if (STAILQ_NEXT(ve, next_ve) == NULL) { in command()
164 ucomm(KINFO *k, VARENT *ve) in ucomm() argument
168 if (STAILQ_NEXT(ve, next_ve) == NULL) { /* last field, don't pad */ in ucomm()
186 tdnam(KINFO *k, VARENT *ve __unused) in tdnam()
200 logname(KINFO *k, VARENT *ve __unused) in logname()
209 state(KINFO *k, VARENT *ve __unused) in state()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Bitcode/Writer/
H A DBitcodeWriter.cpp170 ValueEnumerator VE; member in __anoneb218b5c0111::ModuleBitcodeWriterBase
195 VE(M, ShouldPreserveUseListOrder), Index(Index) { in ModuleBitcodeWriterBase()
201 GlobalValueId = VE.getValues().size(); in ModuleBitcodeWriterBase()
256 return VE.getValueID(VI.getValue()); in getValueId()
936 VE.getAttributeGroups(); in writeAttributeGroupTable()
945 Record.push_back(VE.getAttributeGroupID(Pair)); in writeAttributeGroupTable()
972 Record.push_back(VE.getTypeID(Attr.getValueAsType())); in writeAttributeGroupTable()
998 const std::vector<AttributeList> &Attrs = VE.getAttributeLists(); in writeAttributeTable()
1008 Record.push_back(VE.getAttributeGroupID({i, AS})); in writeAttributeTable()
1020 const ValueEnumerator::TypeList &TypeList = VE.getTypes(); in writeTypeTable()
[all …]
/freebsd/share/doc/psd/02.implement/
H A Dfig2.pic49 move down 1.0625i left 1.25i from PUOFT.D.s
56 move down 1.0625i right 1.25i from PUOFT.D.s
63 move down 2.5i from PUOFT.D.s
71 move right 1.5i from IF.D.w
88 move up .1875i from OFT.A.nw
90 move left 5i down 1.9375i
93 move up 1.63475i right 2.75i from PUOFT.D.s
95 move down .34375i right 2.75i from PUOFT.D.s
97 move down 2.34375i right 2.75i from PUOFT.D.s
100 move up 0.817375i right 2.9i from PUOFT.D.s
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/DXILWriter/
H A DDXILBitcodeWriter.cpp107 ValueEnumerator VE; member in llvm::dxil::DXILBitcodeWriter
137 StrtabBuilder(StrtabBuilder), M(M), VE(M, I8PtrTy), Buffer(Buffer), in DXILBitcodeWriter()
140 GlobalValueId = VE.getValues().size(); in DXILBitcodeWriter()
143 VE.EnumerateType(El.second); in DXILBitcodeWriter()
201 return VE.getValueID(VI.getValue()); in getValueId()
519 return VE.getTypeID(T); in getTypeID()
522 return VE.getTypeID(It->second); in getTypeID()
528 return VE.getTypeID(T); in getTypeID()
529 return VE.getTypeID(I8PtrTy); in getTypeID()
537 return VE.getTypeID(PtrTy->getElementType()); in getGlobalObjectValueTypeID()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Daspeed-video.txt3 The Video Engine (VE) embedded in the Aspeed AST2400/2500/2600 SOCs can
10 - reg: contains the offset and length of the VE memory region
12 the VE (ordering must match the clock-names property)
15 the VE
16 - interrupts: the interrupt associated with the VE on this platform
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/TargetInfo/
H A DVETargetInfo.cpp1 //===-- VETargetInfo.cpp - VE Target Implementation -----------------------===//
20 RegisterTarget<Triple::ve, /*HasJIT=*/false> X(getTheVETarget(), "ve", in LLVMInitializeVETargetInfo()
21 "VE", "VE"); in LLVMInitializeVETargetInfo()
/freebsd/contrib/unbound/validator/
H A Dvalidator.c94 fill_nsec3_iter(struct val_env* ve, char* s, int c) in fill_nsec3_iter() argument
98 free(ve->nsec3_keysize); in fill_nsec3_iter()
99 free(ve->nsec3_maxiter); in fill_nsec3_iter()
100 ve->nsec3_keysize = (size_t*)calloc((size_t)c, sizeof(size_t)); in fill_nsec3_iter()
101 ve->nsec3_maxiter = (size_t*)calloc((size_t)c, sizeof(size_t)); in fill_nsec3_iter()
102 if(!ve->nsec3_keysize || !ve->nsec3_maxiter) { in fill_nsec3_iter()
107 ve->nsec3_keysize[i] = (size_t)strtol(s, &e, 10); in fill_nsec3_iter()
113 ve->nsec3_maxiter[i] = (size_t)strtol(s, &e, 10); in fill_nsec3_iter()
119 if(i>0 && ve->nsec3_keysize[i-1] >= ve->nsec3_keysize[i]) { in fill_nsec3_iter()
121 (int)ve->nsec3_keysize[i-1], in fill_nsec3_iter()
[all …]
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DVE.cpp1 //===--- VE.cpp - Implement VE target feature support ---------------------===//
9 // This file implements VE TargetInfo objects.
13 #include "VE.h"
44 clang::VE::LastTSBuiltin - Builtin::FirstTSBuiltin); in getTargetBuiltins()
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dallwinner,sun4i-a10-ve-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml#
23 const: allwinner,sun4i-a10-ve-clk
49 compatible = "allwinner,sun4i-a10-ve-clk";
52 clock-output-names = "ve";

12345678910>>...93