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/linux/drivers/misc/
H A Datmel-ssc.c3 * Atmel SSC driver
14 #include <linux/atmel-ssc.h>
29 struct ssc_device *ssc; in ssc_request() local
32 list_for_each_entry(ssc, &ssc_list, list) { in ssc_request()
33 if (ssc->pdev->dev.of_node) { in ssc_request()
34 if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc") in ssc_request()
36 ssc->pdev->id = ssc_num; in ssc_request()
40 } else if (ssc->pdev->id == ssc_num) { in ssc_request()
48 pr_err("ssc: ssc%d platform device is missing\n", ssc_num); in ssc_request()
52 if (ssc->user) { in ssc_request()
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/linux/sound/soc/atmel/
H A Datmel_ssc_dai.c3 * atmel_ssc_dai.c -- ALSA SoC ATMEL SSC Audio Layer Platform driver
11 * Based on at91-ssc.c by
25 #include <linux/atmel-ssc.h>
39 * SSC PDC registers required by the PCM DMA engine.
56 * SSC & PDC status bits for transmit and receive.
136 * SSC interrupt handler. Passes PDC interrupts to the DMA
147 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
148 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
151 * Loop through the substreams attached to this SSC. If in atmel_ssc_interrupt()
176 * Serial Clock Ratio Considerations section from the SSC documentation:
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H A Datmel_ssc_dai.h3 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
11 * Based on at91-ssc.c by
21 #include <linux/atmel-ssc.h>
25 /* SSC system clock ids */
26 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
28 /* SSC divider ids */
33 * SSC direction masks
40 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
95 struct ssc_device *ssc; member
97 unsigned short initialized; /* true if SSC has been initialized */
H A Datmel-pcm.h24 #include <linux/atmel-ssc.h>
40 u32 ssc_enable; /* SSC recv/trans enable */
41 u32 ssc_disable; /* SSC recv/trans disable */
42 u32 ssc_error; /* SSC error conditions */
43 u32 ssc_endx; /* SSC ENDTX or ENDRX */
44 u32 ssc_endbuf; /* SSC TXBUFE or RXBUFF */
54 * driver and called by the interface SSC interrupt handler if it is
60 struct ssc_device *ssc; /* SSC device for stream */ member
62 struct atmel_ssc_mask *mask; /* SSC & PDC status bits */
68 * SSC register access (since ssc_writel() / ssc_readl() require literal name)
H A Datmel-pcm-pdc.c27 #include <linux/atmel-ssc.h>
104 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_dma_irq()
110 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
112 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
114 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_dma_irq()
124 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
126 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
171 ssc_writex(params->ssc->regs, SSC_PDC_PTCR, in atmel_pcm_hw_free()
185 ssc_writex(params->ssc->regs, SSC_IDR, in atmel_pcm_prepare()
187 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_prepare()
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H A Datmel-pcm-dma.c20 #include <linux/atmel-ssc.h>
47 * atmel_pcm_dma_irq: SSC interrupt handler for DMAENGINE enabled SSC
49 * We use DMAENGINE to send/receive data to/from SSC so this ISR is only to
68 ssc_writex(prtd->ssc->regs, SSC_CR, prtd->mask->ssc_disable); in atmel_pcm_dma_irq()
72 ssc_readx(prtd->ssc->regs, SSC_RHR); in atmel_pcm_dma_irq()
73 ssc_readx(prtd->ssc->regs, SSC_SR); in atmel_pcm_dma_irq()
82 struct ssc_device *ssc; in atmel_pcm_configure_dma() local
86 ssc = prtd->ssc; in atmel_pcm_configure_dma()
94 slave_config->dst_addr = ssc->phybase + SSC_THR; in atmel_pcm_configure_dma()
97 slave_config->src_addr = ssc->phybase + SSC_RHR; in atmel_pcm_configure_dma()
H A DKconfig7 the ATMEL SSC interface. You will also need
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
30 Say Y or M if you want to add support for Atmel SSC interface
34 tristate "SoC PCM DAI support for AT91 SSC controller using DMA"
39 Say Y or M if you want to add support for Atmel SSC interface
/linux/include/linux/
H A Datmel-ssc.h28 void ssc_free(struct ssc_device *ssc);
30 /* SSC register offsets */
32 /* SSC Control Register */
45 /* SSC Clock Mode Register */
50 /* SSC Receive Clock Mode Register */
69 /* SSC Receive Frame Mode Register */
92 /* SSC Transmit Clock Mode Register */
109 /* SSC Transmit Frame Mode Register */
134 /* SSC Receive Hold Register */
139 /* SSC Transmit Hold Register */
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/linux/Documentation/devicetree/bindings/misc/
H A Datmel-ssc.txt1 * Atmel SSC driver.
4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
16 the memory interface and SSC DMA channel ID (for tx and rx).
22 - When SSC works in slave mode, according to the hardware design, the
28 - This property makes the SSC into an automatically registered DAI.
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/linux/drivers/hid/
H A Dhid-saitek.c40 struct saitek_sc *ssc; in saitek_probe() local
43 ssc = devm_kzalloc(&hdev->dev, sizeof(*ssc), GFP_KERNEL); in saitek_probe()
44 if (ssc == NULL) { in saitek_probe()
49 ssc->quirks = quirks; in saitek_probe()
50 ssc->mode = -1; in saitek_probe()
52 hid_set_drvdata(hdev, ssc); in saitek_probe()
72 struct saitek_sc *ssc = hid_get_drvdata(hdev); in saitek_report_fixup() local
74 if ((ssc->quirks & SAITEK_FIX_PS1000) && *rsize == 137 && in saitek_report_fixup()
96 struct saitek_sc *ssc = hid_get_drvdata(hdev); in saitek_raw_event() local
98 if (ssc->quirks & SAITEK_RELEASE_MODE_RAT7 && size == 7) { in saitek_raw_event()
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/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ssc-block-bus.yaml4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
20 The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
74 SSC Branch Control Register reset (associated with the ssc_xo and
84 description: describes how to locate the ssc AXI halt register
88 - description: offset for the ssc AXI halt register
118 …// devices under this node are physically located in the SSC block, connected to an ssc-internal b…
124 compatible = "qcom,msm8998-ssc-block-bus", "qcom,ssc-block-bus";
/linux/sound/spi/
H A Dat73c213.c3 * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
27 #include <linux/atmel-ssc.h>
69 struct ssc_device *ssc; member
75 /* Protect SSC registers against concurrent access. */
131 unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); in snd_at73c213_set_bitrate()
146 /* SSC clock / (bitrate * stereo * 16-bit). */ in snd_at73c213_set_bitrate()
166 /* SSC clock / (ssc divider * 16-bit * stereo). */ in snd_at73c213_set_bitrate()
192 /* Set divider in SSC device. */ in snd_at73c213_set_bitrate()
193 ssc_writel(chip->ssc->regs, CMR, ssc_div/2); in snd_at73c213_set_bitrate()
195 /* SSC clock / (ssc divider * 16-bit * stereo). */ in snd_at73c213_set_bitrate()
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/linux/drivers/scsi/isci/
H A Dprobe_roms.h228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
229 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
235 * Down-spreading SSC (only method allowed for SATA):
236 * SATA SSC Tx Disabled = 0x0
237 * SATA SSC Tx at +0 / -1419 PPM Spread = 0x2
238 * SATA SSC Tx at +0 / -2129 PPM Spread = 0x3
239 * SATA SSC Tx at +0 / -4257 PPM Spread = 0x6
240 * SATA SSC Tx at +0 / -4967 PPM Spread = 0x7
244 * SAS SSC Tx Disabled = 0x0
248 * Down-spreading SSC:
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/linux/Documentation/devicetree/bindings/spi/
H A Dst,ssc-spi.yaml4 $id: http://devicetree.org/schemas/spi/st,ssc-spi.yaml#
7 title: STMicroelectronics SSC SPI Controller
10 The STMicroelectronics SSC SPI controller can be found on STi platforms
31 const: ssc
54 clock-names = "ssc";
/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt43 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
45 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
59 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
61 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
63 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
/linux/Documentation/devicetree/bindings/sound/
H A Datmel,sam9x5-wm8731-audio.yaml23 atmel,ssc-controller:
25 description: The phandle of the SSC controller.
55 - atmel,ssc-controller
74 atmel,ssc-controller = <&ssc0>;
H A Datmel,asoc-wm8904.yaml23 atmel,ssc-controller:
25 description: The phandle of the SSC controller.
60 - atmel,ssc-controller
82 atmel,ssc-controller = <&ssc0>;
H A Datmel-at91sam9g20ek-wm8731-audio.txt7 - atmel,ssc-controller: The phandle of the SSC controller
24 atmel,ssc-controller = <&ssc0>;
/linux/drivers/spi/
H A Dspi-st-ssc4.c25 /* SSC registers */
33 /* SSC Control */
48 /* SSC Interrupt Enable */
54 /* SSC SPI Controller */
59 /* SSC SPI current transaction */
211 /* Set SSC_CTL and enable SSC */ in spi_st_setup()
296 spi_st->clk = devm_clk_get(&pdev->dev, "ssc"); in spi_st_probe()
316 /* Disable I2C and Reset SSC */ in spi_st_probe()
327 /* Set SSC into target mode before reconfiguring PIO pins */ in spi_st_probe()
457 MODULE_DESCRIPTION("STM SSC SPI driver");
/linux/Documentation/devicetree/bindings/phy/
H A Drenesas,usb3-phy.yaml33 # If you want to use the ssc, the clock-frequency of usb_extal
51 renesas,ssc-range:
53 Enable/disable spread spectrum clock (ssc). 0 or the property doesn't
54 exist means disabling the ssc. The actual value will be -<value> ppm.
H A Dphy-rockchip-naneng-combphy.yaml43 rockchip,enable-ssc:
46 The option SSC can be enabled for U3, SATA and PCIE.
47 Most commercially available platforms use SSC to reduce EMI.
60 differential clock output(optional with SSC) for system applications.
/linux/arch/arm/boot/dts/st/
H A Dstih407-family.dtsi369 clock-names = "ssc";
384 clock-names = "ssc";
399 clock-names = "ssc";
414 clock-names = "ssc";
429 clock-names = "ssc";
444 clock-names = "ssc";
461 clock-names = "ssc";
476 clock-names = "ssc";
491 clock-names = "ssc";
505 clock-names = "ssc";
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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8186-fhctl.yaml15 Spread spectrum clocking (SSC) is another function provided by this hardware.
34 mediatek,hopping-ssc-percent:
57 mediatek,hopping-ssc-percent = <3>;
/linux/drivers/mmc/host/
H A Dsdhci-pci-gli.c465 u32 ssc; in gl9750_set_ssc() local
469 ssc = sdhci_readl(host, SDHCI_GLI_9750_PLLSSC); in gl9750_set_ssc()
472 ssc &= ~SDHCI_GLI_9750_PLLSSC_PPM; in gl9750_set_ssc()
475 ssc |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_PPM, ppm); in gl9750_set_ssc()
476 sdhci_writel(host, ssc, SDHCI_GLI_9750_PLLSSC); in gl9750_set_ssc()
485 /* set pll to 205MHz and ssc */ in gl9750_set_ssc_pll_205mhz()
494 /* set pll to 100MHz and ssc */ in gl9750_set_ssc_pll_100mhz()
503 /* set pll to 50MHz and ssc */ in gl9750_set_ssc_pll_50mhz()
662 u32 ssc; in gl9755_set_ssc() local
666 pci_read_config_dword(pdev, PCI_GLI_9755_PLLSSC, &ssc); in gl9755_set_ssc()
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/linux/drivers/phy/xilinx/
H A Dphy-zynqmp.c62 /* PLL SSC step size offsets */
71 /* SSC step size parameters */
184 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
187 * @steps: number of steps of SSC (Spread Spectrum Clock)
404 const struct xpsgtr_ssc *ssc; in xpsgtr_configure_pll() local
407 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll()
408 step_size = ssc->step_size; in xpsgtr_configure_pll()
411 PLL_FREQ_MASK, ssc->pll_ref_clk); in xpsgtr_configure_pll()
421 /* SSC step size [7:0] */ in xpsgtr_configure_pll()
425 /* SSC step size [15:8] */ in xpsgtr_configure_pll()
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