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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td159 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
161 [(set SPR:$Sd, (alignedload32 addrmode5:$addr))]>,
194 def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5:$addr),
196 [(alignedstore32 SPR:$Sd, addrmode5:$addr)]>,
434 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
436 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>,
459 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
461 [(set SPR:$Sd, (fsub SPR:$Sn, SPR:$Sm))]>,
484 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
486 [(set SPR:$Sd, (fdiv SPR:$Sn, SPR:$Sm))]>,
[all …]
H A DARMInstrCDE.td487 def cde_vcx_s_regs : CDE_VCX_RegisterOperandsTemplate<SPR>;
550 def : Pat<(f32 (int_arm_cde_vcx1a timm:$coproc, (f32 SPR:$acc), timm:$imm)),
551 (f32 (CDE_VCX1A_fpsp p_imm:$coproc, SPR:$acc, imm_11b:$imm))>;
557 def : Pat<(f32 (int_arm_cde_vcx2 timm:$coproc, (f32 SPR:$n), timm:$imm)),
558 (f32 (CDE_VCX2_fpsp p_imm:$coproc, SPR:$n, imm_6b:$imm))>;
559 def : Pat<(f32 (int_arm_cde_vcx2a timm:$coproc, (f32 SPR:$acc), (f32 SPR:$n),
561 (f32 (CDE_VCX2A_fpsp p_imm:$coproc, SPR:$acc, SPR:$n, imm_6b:$imm))>;
568 def : Pat<(f32 (int_arm_cde_vcx3 timm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
570 (f32 (CDE_VCX3_fpsp p_imm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
572 def : Pat<(f32 (int_arm_cde_vcx3a timm:$coproc, (f32 SPR:$acc), (f32 SPR:$n),
[all …]
H A DA15SDOptimizer.cpp1 //=== A15SDOptimizerPass.cpp - Optimize DPR and SPR register accesses on A15==//
20 // This file defines a pre-regalloc pass which looks for SPR producers which
131 // Returns true if this is a use of a SPR register.
152 // for an SPR register that will be used in VDUP32d pseudo.
320 // Return true if this MachineInstr inserts a scalar (SPR) value into
412 // Creates a DPR register from an SPR one by using a VDUP.
428 // Creates a SPR register from a DPR by copying the value in lane 0.
443 // Takes two SPR registers and creates a DPR by using a REG_SEQUENCE.
502 // SPR registers and DPR/QPR registers. It does so by performing VDUPs on all
563 // REG_SEQUENCE pseudos that insert an SPR value into a DPR register or in runOnInstruction()
[all …]
H A DARMRegisterInfo.td422 def SPR : RegisterClass<"ARM", [f32], 32, (sequence "S%u", 0, 31)> {
423 let AltOrders = [(add (decimate SPR, 2), SPR),
424 (add (decimate SPR, 4),
425 (decimate SPR, 2),
426 (decimate (rotl SPR, 1), 4),
427 (decimate (rotl SPR, 1), 2))];
435 let AltOrders = [(add (decimate HPR, 2), SPR),
446 // Subset of SPR which can be used as a source of NEON scalars for 16-bit
471 def FPWithVPR : RegisterClass<"ARM", [f32], 32, (add SPR, DPR, VPR)> {
476 // 32-bit SPR subregs).
[all …]
H A DARMRegisterBankInfo.cpp41 // SPR Partial Mapping
61 "Wrong mapping for SPR"); in checkPartialMappings()
111 "Wrong value mapping for 3 SPR ops instruction"); in checkValueMappings()
114 "Wrong value mapping for 3 SPR ops instruction"); in checkValueMappings()
117 "Wrong value mapping for 3 SPR ops instruction"); in checkValueMappings()
H A DARMRegisterBanks.td13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
/freebsd/contrib/wpa/src/ap/
H A Dieee802_11_he.c324 struct ieee80211_spatial_reuse *spr; in hostapd_eid_spatial_reuse() local
328 if (!hapd->iface->conf->spr.sr_control) in hostapd_eid_spatial_reuse()
331 if (hapd->iface->conf->spr.sr_control & in hostapd_eid_spatial_reuse()
335 if (hapd->iface->conf->spr.sr_control & in hostapd_eid_spatial_reuse()
343 spr = (struct ieee80211_spatial_reuse *) pos; in hostapd_eid_spatial_reuse()
344 os_memset(spr, 0, sizeof(*spr)); in hostapd_eid_spatial_reuse()
346 spr->sr_ctrl = hapd->iface->conf->spr.sr_control; in hostapd_eid_spatial_reuse()
348 spr_param = spr->params; in hostapd_eid_spatial_reuse()
349 if (spr->sr_ctrl & SPATIAL_REUSE_NON_SRG_OFFSET_PRESENT) { in hostapd_eid_spatial_reuse()
351 hapd->iface->conf->spr.non_srg_obss_pd_max_offset; in hostapd_eid_spatial_reuse()
[all …]
/freebsd/sys/arm/mv/
H A Dmv_spi.c259 mv_spi_psc_calc(uint32_t clock, uint32_t *spr, uint32_t *sppr) in mv_spi_psc_calc() argument
264 for (*spr = 2; *spr <= 15; (*spr)++) { in mv_spi_psc_calc()
266 divider = *spr * (1 << *sppr); in mv_spi_psc_calc()
279 uint32_t clock, cs, mode, reg, spr, sppr; in mv_spi_transfer() local
298 if (clock == 0 || mv_spi_psc_calc(clock, &spr, &sppr) != 0) { in mv_spi_transfer()
325 reg |= spr & MV_SPI_CONF_CLOCK_SPR_MASK; in mv_spi_transfer()
/freebsd/lib/libc/nls/
H A Dsk_SK.ISO8859-2.msg86 40 Pr�li� dlh� spr�va
172 83 Neexistuje spr�va �elan�ho typu
182 88 Chybn� alebo poru�en� spr�va
184 89 �iadna spr�va nie je k dispoz�cii
/freebsd/contrib/bc/tests/
H A Dread.sh99 read_multiple=$(printf '%spR\n%spR\n%spR\n' "3" "2" "1")
/freebsd/sys/powerpc/include/
H A Dspr.h28 * $NetBSD: spr.h,v 1.25 2002/08/14 15:38:40 matt Exp $
88 * architectures the SPR is valid on - 4 for 4xx series,
147 #define FSCR_IC_PM 0x0300000000000000ULL /* Read or write access of a Performance Monitor SPR …
165 #define SPR_USPRG0 0x100 /* 4.8 User SPR General 0 */
167 #define SPR_SPRG0 0x110 /* 468 SPR General 0 */
168 #define SPR_SPRG1 0x111 /* 468 SPR General 1 */
169 #define SPR_SPRG2 0x112 /* 468 SPR General 2 */
170 #define SPR_SPRG3 0x113 /* 468 SPR General 3 */
171 #define SPR_SPRG4 0x114 /* 4.8 SPR General 4 */
172 #define SPR_SPRG5 0x115 /* 4.8 SPR General 5 */
[all …]
H A Dkdb.h36 #include <machine/spr.h>
/freebsd/sys/powerpc/powerpc/
H A Dexec_machdep.c1213 emulate_mfspr(int spr, int reg, struct trapframe *frame){ in emulate_mfspr() argument
1218 if (spr == SPR_DSCR || spr == SPR_DSCRP) { in emulate_mfspr()
1233 emulate_mtspr(int spr, int reg, struct trapframe *frame){ in emulate_mtspr() argument
1238 if (spr == SPR_DSCR || spr == SPR_DSCRP) { in emulate_mtspr()
1257 int rs, spr; in ppc_instr_emulate() local
1269 spr = (instr & 0x1ff800) >> 16; in ppc_instr_emulate()
1270 return emulate_mfspr(spr, rs, frame); in ppc_instr_emulate()
1273 spr = (instr & 0x1ff800) >> 16; in ppc_instr_emulate()
1274 return emulate_mtspr(spr, rs, frame); in ppc_instr_emulate()
H A Dmachdep.c122 #include <machine/spr.h>
759 * Simple ddb(4) command/hack to view any SPR on the running CPU.
768 DB_SHOW_COMMAND(spr, db_show_spr) in DB_SHOW_COMMAND() argument
770 register_t spr; in DB_SHOW_COMMAND() local
790 spr = get_spr(sprno); in DB_SHOW_COMMAND()
792 db_printf("SPR %d(%x): %lx\n", saved_sprno, saved_sprno, in DB_SHOW_COMMAND()
793 (unsigned long)spr); in DB_SHOW_COMMAND()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td54 // SPR - One of the 32-bit special-purpose registers
55 class SPR<bits<10> num, string n> : PPCReg<n> {
291 def LR : SPR<8, "lr">, DwarfRegNum<[-2, 65]>;
292 def LR8 : SPR<8, "lr">, DwarfRegNum<[65, -2]> {
297 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>;
298 def CTR8 : SPR<9, "ctr">, DwarfRegNum<[66, -2]> {
303 def VRSAVE: SPR<256, "vrsave">, DwarfRegNum<[109]>;
306 def SPEFSCR: SPR<512, "spefscr">, DwarfRegNum<[612, 112]>;
308 def XER: SPR<1, "xer">, DwarfRegNum<[76]>;
311 // (which really is SPR register 1); this is the only bit interesting to a
[all …]
H A DPPCInstrFormats.td1693 bits<10> SPR;
1696 let Inst{11} = SPR{4};
1697 let Inst{12} = SPR{3};
1698 let Inst{13} = SPR{2};
1699 let Inst{14} = SPR{1};
1700 let Inst{15} = SPR{0};
1701 let Inst{16} = SPR{9};
1702 let Inst{17} = SPR{8};
1703 let Inst{18} = SPR{7};
1704 let Inst{19} = SPR{
[all...]
/freebsd/sys/contrib/device-tree/Bindings/powerpc/opal/
H A Dpower-mgt.txt55 0x00800000 /* This state uses SPR PMICR instruction */
110 state if the flag indicates that pmicr SPR should be set. This
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/PPC64/
H A DEmulateInstructionPPC64.cpp139 "mfspr RT, SPR"}, in GetOpcodeForInstruction()
205 uint32_t spr = Bits32(opcode, 20, 11); in EmulateMFSPR() local
210 if (rt != gpr_r0_ppc64le || spr != SPR_LR) in EmulateMFSPR()
/freebsd/lib/libc/powerpcspe/gen/
H A Dfpgetmask.c34 #include <machine/spr.h>
H A Dfpgetround.c34 #include <machine/spr.h>
H A Dfpgetsticky.c36 #include <machine/spr.h>
H A Dfpsetmask.c34 #include <machine/spr.h>
H A Dfpsetround.c34 #include <machine/spr.h>
H A Dflt_rounds.c36 #include <machine/spr.h>
/freebsd/lib/libsys/powerpc/
H A D__vdso_gettc.c37 #include <machine/spr.h>

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