powernv: Explicitly enable the facilities we support

Thus far we've relied on the firmware setting HFSCR correctly, enabling
all facilities. However, it appears some recent firmwares do not.
Linux

powernv: Explicitly enable the facilities we support

Thus far we've relied on the firmware setting HFSCR correctly, enabling
all facilities. However, it appears some recent firmwares do not.
Linux explicitly enables all facilities it supports (including
transactional memory, which new firmwares apparently do not enable), so
do the same here, explicitly enable all the facilities FreeBSD supports.

MFC after: 1 week

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powerpc: Add nominal support for POWER10 and POWER11

sys: Remove $FreeBSD$: one-line .h pattern

Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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Wrap the default SPE config in its own #define

No functional change. Cleans up the code a little.

Clean up spr.h

Remove SPRs for CPUs FreeBSD doesn't run on
Add debug register SPRs from the Freescale EREF

Fix powerpc and powerpcspe builds

This change fixes 32-bit PowerPC builds, that r367390 broke
(shift count >= width of type).

[PowerPC] Make PPC 970 PMC SPRs the standard ones

And add a _74XX suffix to 74XX SPRs.

This is a preparation for adding support to POWER8/9 PMCs, which have most
SPRs equal to 970 ones.

Reviewed b

[PowerPC] Make PPC 970 PMC SPRs the standard ones

And add a _74XX suffix to 74XX SPRs.

This is a preparation for adding support to POWER8/9 PMCs, which have most
SPRs equal to 970 ones.

Reviewed by: jhibbits
Sponsored by: Eldorado Research Institute (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D26532

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[PowerPC64LE] powernv ILE setup code.

When running without a hypervisor, we need to set the ILE bit in the LPCR
ourselves.

For the boot processor, handle it in powernv_attach() like we do for other

[PowerPC64LE] powernv ILE setup code.

When running without a hypervisor, we need to set the ILE bit in the LPCR
ourselves.

For the boot processor, handle it in powernv_attach() like we do for other
LPCR bits.

No change for the APs, as they will use the lpcr global to set up their own
LPCR when they do their own cpudep_ap_early_bootstrap() and pick up this
automatically.

Sponsored by: Tag1 Consulting, Inc.

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powerpc: clean up empty lines in .c and .h files

[PowerPC] Fix booke64 qemu infinite loop in L2 cache enable

Since qemu does not implement the L2 cache, we get stuck forever waiting
for a bit to be set when trying to invalidate it.

To prevent tha

[PowerPC] Fix booke64 qemu infinite loop in L2 cache enable

Since qemu does not implement the L2 cache, we get stuck forever waiting
for a bit to be set when trying to invalidate it.

To prevent that, we should bail out if the L2 cache is missing.
One easy way to check this is L2CFG0 == 0 (since L2CSIZE always has at
least one bit set in a valid implementation)

(tested on qemu, rb800, and x5000)

Reviewed by: jhibbits
Sponsored by: Tag1 Consulting, Inc.
Differential Revision: https://reviews.freebsd.org/D25225

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powerpc64: Implement Radix MMU for POWER9 CPUs

Summary:
POWER9 supports two MMU formats: traditional hashed page tables, and Radix
page tables, similar to what's presesnt on most other architectures

powerpc64: Implement Radix MMU for POWER9 CPUs

Summary:
POWER9 supports two MMU formats: traditional hashed page tables, and Radix
page tables, similar to what's presesnt on most other architectures. The
PowerISA also specifies a process table -- a table of page table pointers--
which on the POWER9 is only available with the Radix MMU, so we can take
advantage of it with the Radix MMU driver.

Written by Matt Macy.

Differential Revision: https://reviews.freebsd.org/D19516

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powerpc: Add a CPU-custom machine check handler

Summary:
Some machine checks are process-recoverable, others are not. Let a
CPU-specific handler decide what to do.

This works around a machine chec

powerpc: Add a CPU-custom machine check handler

Summary:
Some machine checks are process-recoverable, others are not. Let a
CPU-specific handler decide what to do.

This works around a machine check error hit while building www/firefox
and mail/thunderbird, which would otherwise cause the build to fail.

More work is needed to handle all possible machine check conditions, but
this is sufficient to unblock some ports building.

Differential Revision: https://reviews.freebsd.org/D23731

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powerpc: Axe PPC4xx support.

Summary:
The support was added almost a decade ago, and never completed. Just axe
it. It was also inadvertently broken 5 years ago, and nobody noticed.

Reviewed by: b

powerpc: Axe PPC4xx support.

Summary:
The support was added almost a decade ago, and never completed. Just axe
it. It was also inadvertently broken 5 years ago, and nobody noticed.

Reviewed by: bdragon
Differential Revision: https://reviews.freebsd.org/D23753

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Add support for building Book-E kernels with clang/lld.

This involved several changes:

* Since lld does not like text relocations, replace SMP boot page text relocs
in booke/locore.S with position-

Add support for building Book-E kernels with clang/lld.

This involved several changes:

* Since lld does not like text relocations, replace SMP boot page text relocs
in booke/locore.S with position-independent math, and track the virtual base
in the SMP boot page header.

* As some SPRs are interpreted differently on clang due to the way it handles
platform-specific SPRs, switch m*dear and m*esr mnemonics out for regular
m*spr. Add both forms of SPR_DEAR to spr.h so the correct encoding is selected.

* Change some hardcoded 32 bit things in the boot page to be pointer-sized, and
fix alignment.

* Fix 64-bit build of booke/pmap.c when enabling pmap debugging.

Additionally, I took the opportunity to document how the SMP boot page works.

Approved by: jhibbits (mentor)
Differential Revision: https://reviews.freebsd.org/D21999

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MFHead @347527

Sponsored by: The FreeBSD Foundation

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to

powerpc: Add support for additional FSCR-managed facilities

Add support to enable, save, and restore the following facilities:
* Target Address Register (bctar) -- seemingly just another register to
branch to.
* Event-based branching -- an interrupt-like userspace event handler
subsystem.
* Load-monitored facility -- A facility that allows monitoring a range of
physical memory, and triggering an event on access. Targeted to garbage
collection software features.

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powerpc: Add SPR definitions for additional POWER8/POWER9 facilities

This only adds the new SPR definitions and the associated FSCR bits. The
facilities themselves will be added in separate commits.

powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
gu

powerpc64: Add the DSCR facility on POWER8 and later

The Data Stream Control Register (DSCR) is privileged on POWER7, but
unprivileged (different register) on POWER8 and later. However, it's now
guarded by a new register, the Facility Status and Control Register, instead of
the MSR like other pre-existing facilities (FPU, Altivec). The FSCR must be
managed explicitly, since it's effectively an extension of the MSR.

Tested by: Brandon Bergren

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powerpc: Add POWER8NVL definition

The POWER8NVL (POWER8 NVLink) architecturally behaves identically to the
POWER8, with a different PVR identifier. Mark it as such, so it shows up
appropriately to

powerpc: Add POWER8NVL definition

The POWER8NVL (POWER8 NVLink) architecturally behaves identically to the
POWER8, with a different PVR identifier. Mark it as such, so it shows up
appropriately to the user.

Reported by: Alexey Kardashevskiy
MFC after: 2 weeks

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powerpc: Fix whitespace in SPR header.

powerpc64: Increase the nap level on power9 idling

The POWER9 documentation specifies that levels 0-3 are the 'lightest' sleep
level, meaning lowest latency and with no state loss. However, state 3

powerpc64: Increase the nap level on power9 idling

The POWER9 documentation specifies that levels 0-3 are the 'lightest' sleep
level, meaning lowest latency and with no state loss. However, state 3 is
not implemented, and is instead reserved for future chips. This now
properly configures the PSSCR, specifying state 2 as the lowest level to
enter, but request level 0 for quickest sleep level. If the OCC determines
that the CPU can enter states 1 or 2 it will trigger the transition to those
states on demand.

MFC after: 1 week

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MFHead@r345677

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer f

powernv: Add Hypervisor Maintenance Interrupt handler

Attempting to build www/firefox on POWER9 resulted in a HMI exception being
thrown, a fatal trap currently. This is typically caused by timer facility
errors, but examination of the Hypervisor Maintenance Exception Register
(HMER) yielded only that an exception had recovered, with no information of
the actual exception cause.

When an HMI occurs, OPAL_HANDLE_HMI or OPAL_HANDLE_HMI2 must be called to
handle the exception at the firmware level. If the exception is handled, we
can continue.

This adds only the preliminary handler, enough to prevent package building
from panicking. An enhancement in the future is to use the flags returned
by OPAL_HANDLE_HMI2 to print more useful error messages, and log maintenance
events.

Reviewed by: luporl
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D19634

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Merge ^/head r339015 through r339669.