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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dal,alpine-msix.yaml27 al,msi-num-spis:
28 description: number of SPIs assigned to the MSI frame, relative to SPI0
36 - al,msi-num-spis
48 al,msi-num-spis = <160>;
H A Dsocionext,synquacer-exiu.yaml15 level-high type GICv3 SPIs.
H A Dqcom,mpm.yaml64 A set of MPM pin numbers and the corresponding GIC SPIs.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt76x8-pinctrl.yaml42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
266 enum: [spis]
343 const: spis
347 enum: [spis]
393 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
H A Dimg,pistachio-pinctrl.txt64 mfio11 spis
65 mfio12 spis
66 mfio13 spis
67 mfio14 spis
H A Dstarfive,jh7110-sys-pinctrl.yaml16 includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
/linux/net/ipv4/netfilter/
H A Dipt_ah.c44 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt()
/linux/net/netfilter/
H A Dxt_esp.c50 return spi_match(espinfo->spis[0], espinfo->spis[1], ntohl(eh->spi), in esp_mt()
H A Dxt_ipcomp.c54 return spi_match(compinfo->spis[0], compinfo->spis[1], in comp_mt()
/linux/net/ipv6/netfilter/
H A Dip6t_ah.c59 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt76x8.c95 FUNC("spis utif", 2, 14, 4),
96 FUNC("spis", 0, 14, 4),
193 GRP_G("spis", spis_grp, MT76X8_GPIO_MODE_MASK,
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi115 arm,msi-num-spis = <32>;
122 arm,msi-num-spis = <32>;
129 arm,msi-num-spis = <32>;
136 arm,msi-num-spis = <32>;
/linux/drivers/irqchip/
H A Dirq-gic-v2m.c36 * [9:0] Numer of SPIs assigned to MSI
71 u32 nr_spis; /* The number of SPIs for MSIs */
225 pr_err("Number of SPIs (%u) exceed maximum (%u)\n", in is_msi_spi_valid()
407 !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) in gicv2m_of_init()
H A Dqcom-pdc.c208 * PDC allocates direct SPIs at the beginning and in pdc_pin_is_gpio()
209 * all GPIOs as SPIs are allocated after direct SPIs. in pdc_pin_is_gpio()
567 * PDC secondary chip is only set for the GPIO interrupts as SPIs. in qcom_pdc_alloc()
H A Dirq-hip04.c126 /* SPIs have restrictions on the supported types */ in hip04_irq_set_type()
332 /* For SPIs, we need to add 16 more to get the irq ID number */ in hip04_irq_domain_xlate()
H A Dirq-gic-common.c110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
/linux/include/uapi/linux/netfilter/
H A Dxt_esp.h8 __u32 spis[2]; /* Security Parameter Index */ member
H A Dxt_ipcomp.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/include/uapi/linux/netfilter_ipv4/
H A Dipt_ah.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/include/uapi/linux/netfilter_ipv6/
H A Dip6t_ah.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/kernel/bpf/
H A Dliveness.c431 * Runs of 3+ consecutive fully-set SPIs are collapsed: "fp0-8..-24"
433 static char *fmt_spis_mask(struct bpf_verifier_env *env, int frame, bool first, spis_t spis) in fmt_spis_mask() argument
442 bool lo = spis_test_bit(spis, spi * 2); in fmt_spis_mask()
443 bool hi = spis_test_bit(spis, spi * 2 + 1); in fmt_spis_mask()
454 spis_test_bit(spis, spi * 2 + 2) && in fmt_spis_mask()
455 spis_test_bit(spis, spi * 2 + 3) && in fmt_spis_mask()
456 spis_test_bit(spis, spi * 2 + 4) && in fmt_spis_mask()
457 spis_test_bit(spis, spi * 2 + 5)) { in fmt_spis_mask()
458 /* 3+ consecutive full spis */ in fmt_spis_mask()
461 spis_test_bit(spis, (spi + 1) * 2) && in fmt_spis_mask()
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
/linux/drivers/pinctrl/
H A Dpinctrl-pistachio.c576 FUNCTION(spis),
690 MFIO_PIN_GROUP(11, SPIS),
691 MFIO_PIN_GROUP(12, SPIS),
692 MFIO_PIN_GROUP(13, SPIS),
693 MFIO_PIN_GROUP(14, SPIS),
/linux/arch/arm/boot/dts/amazon/
H A Dalpine.dtsi172 al,msi-num-spis = <64>;
/linux/arch/m68k/include/asm/
H A DMC68328.h803 * 0xFFFFF7xx -- Serial Peripheral Interface Slave (SPIS)
818 #define SPISR_SPISEN 0x0100 /* SPIS module enable */
824 #define SPISR_IRQEN 0x4000 /* SPIS IRQ Enable */
825 #define SPISR_SPISIRQ 0x8000 /* SPIS IRQ posted */

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