| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt76x8-pinctrl.yaml | 42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
266 enum: [spis]
343 const: spis
347 enum: [spis]
393 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
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| H A D | img,pistachio-pinctrl.txt | 64 mfio11 spis
65 mfio12 spis
66 mfio13 spis
67 mfio14 spis
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| H A D | starfive,jh7110-sys-pinctrl.yaml | 16 includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | al,alpine-msix.txt | 13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
24 al,msi-num-spis = <160>;
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| H A D | nvidia,tegra20-ictlr.txt | 27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
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| H A D | socionext,synquacer-exiu.yaml | 15 level-high type GICv3 SPIs.
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| H A D | qcom,mpm.yaml | 64 A set of MPM pin numbers and the corresponding GIC SPIs.
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| /linux/net/ipv6/netfilter/ |
| H A D | ip6t_ah.c | 65 spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
77 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
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| /linux/net/ipv4/netfilter/ |
| H A D | ipt_ah.c | 50 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt()
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| /linux/net/netfilter/ |
| H A D | xt_esp.c | 56 return spi_match(espinfo->spis[0], espinfo->spis[1], ntohl(eh->spi), in esp_mt()
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| H A D | xt_ipcomp.c | 60 return spi_match(compinfo->spis[0], compinfo->spis[1], in comp_mt()
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt76x8.c | 95 FUNC("spis utif", 2, 14, 4),
96 FUNC("spis", 0, 14, 4),
193 GRP_G("spis", spis_grp, MT76X8_GPIO_MODE_MASK,
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap80x.dtsi | 100 arm,msi-num-spis = <32>;
107 arm,msi-num-spis = <32>;
114 arm,msi-num-spis = <32>;
121 arm,msi-num-spis = <32>;
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v2m.c | 36 * [9:0] Numer of SPIs assigned to MSI
71 u32 nr_spis; /* The number of SPIs for MSIs */
223 pr_err("Number of SPIs (%u) exceed maximum (%u)\n", in is_msi_spi_valid()
404 !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) in gicv2m_of_init()
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| H A D | irq-hip04.c | 126 /* SPIs have restrictions on the supported types */ in hip04_irq_set_type()
332 /* For SPIs, we need to add 16 more to get the irq ID number */ in hip04_irq_domain_xlate()
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| H A D | irq-gic-common.c | 110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
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| /linux/include/kvm/ |
| H A D | arm_vgic.h | 123 * SPIs and LPIs: The VCPU whose ap_list
267 struct vgic_irq *spis; member
418 * Setup a default flat gsi routing table mapping all SPIs
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| /linux/include/uapi/linux/netfilter/ |
| H A D | xt_esp.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| H A D | xt_ipcomp.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/include/uapi/linux/netfilter_ipv4/ |
| H A D | ipt_ah.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/include/uapi/linux/netfilter_ipv6/ |
| H A D | ip6t_ah.h | 8 __u32 spis[2]; /* Security Parameter Index */ member
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer_mmio.yaml | 17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
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| H A D | arm,arch_timer.yaml | 19 to deliver its interrupts via SPIs.
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-pistachio.c | 577 FUNCTION(spis),
691 MFIO_PIN_GROUP(11, SPIS),
692 MFIO_PIN_GROUP(12, SPIS),
693 MFIO_PIN_GROUP(13, SPIS),
694 MFIO_PIN_GROUP(14, SPIS),
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| /linux/arch/arm64/kvm/vgic/ |
| H A D | vgic-irqfd.c | 125 * Injecting SPIs is always possible in atomic context in kvm_arch_set_irq_inatomic()
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