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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt76x8-pinctrl.yaml42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
266 enum: [spis]
343 const: spis
347 enum: [spis]
393 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
H A Dimg,pistachio-pinctrl.txt64 mfio11 spis
65 mfio12 spis
66 mfio13 spis
67 mfio14 spis
H A Dstarfive,jh7110-sys-pinctrl.yaml16 includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dal,alpine-msix.txt13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
24 al,msi-num-spis = <160>;
H A Dnvidia,tegra20-ictlr.txt27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
H A Dsocionext,synquacer-exiu.yaml15 level-high type GICv3 SPIs.
H A Dqcom,mpm.yaml64 A set of MPM pin numbers and the corresponding GIC SPIs.
/linux/net/ipv6/netfilter/
H A Dip6t_ah.c65 spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
77 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt6()
/linux/arch/arm64/kvm/vgic/
H A Dvgic-init.c154 * @nr_spis: number of spis, frozen by caller
162 dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT); in kvm_vgic_dist_init()
163 if (!dist->spis) in kvm_vgic_dist_init()
175 struct vgic_irq *irq = &dist->spis[i]; in kvm_vgic_dist_init()
193 kfree(dist->spis); in kvm_vgic_dist_init()
194 dist->spis = NULL; in kvm_vgic_dist_init()
338 * - the number of spis
360 /* freeze the number of spis */ in vgic_init()
408 kfree(dist->spis); in kvm_vgic_dist_destroy()
409 dist->spis = NULL; in kvm_vgic_dist_destroy()
H A Dvgic-irqfd.c125 * Injecting SPIs is always possible in atomic context in kvm_arch_set_irq_inatomic()
/linux/net/ipv4/netfilter/
H A Dipt_ah.c50 return spi_match(ahinfo->spis[0], ahinfo->spis[1], in ah_mt()
/linux/net/netfilter/
H A Dxt_esp.c56 return spi_match(espinfo->spis[0], espinfo->spis[1], ntohl(eh->spi), in esp_mt()
H A Dxt_ipcomp.c60 return spi_match(compinfo->spis[0], compinfo->spis[1], in comp_mt()
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt76x8.c95 FUNC("spis utif", 2, 14, 4),
96 FUNC("spis", 0, 14, 4),
193 GRP_G("spis", spis_grp, MT76X8_GPIO_MODE_MASK,
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi115 arm,msi-num-spis = <32>;
122 arm,msi-num-spis = <32>;
129 arm,msi-num-spis = <32>;
136 arm,msi-num-spis = <32>;
/linux/Documentation/devicetree/bindings/arm/
H A Dpmu.yaml89 When using SPIs, specifies a list of phandles to CPU
91 the SPIs listed in the interrupts property.
/linux/drivers/irqchip/
H A Dirq-gic-v2m.c36 * [9:0] Numer of SPIs assigned to MSI
71 u32 nr_spis; /* The number of SPIs for MSIs */
220 pr_err("Number of SPIs (%u) exceed maximum (%u)\n", in is_msi_spi_valid()
402 !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) in gicv2m_of_init()
H A Dirq-hip04.c126 /* SPIs have restrictions on the supported types */ in hip04_irq_set_type()
332 /* For SPIs, we need to add 16 more to get the irq ID number */ in hip04_irq_domain_xlate()
H A Dirq-gic-common.c110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
/linux/include/uapi/linux/netfilter/
H A Dxt_esp.h8 __u32 spis[2]; /* Security Parameter Index */ member
H A Dxt_ipcomp.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/include/uapi/linux/netfilter_ipv4/
H A Dipt_ah.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/include/uapi/linux/netfilter_ipv6/
H A Dip6t_ah.h8 __u32 spis[2]; /* Security Parameter Index */ member
/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
H A Darm,arch_timer.yaml19 to deliver its interrupts via SPIs.

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