xref: /linux/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml (revision bf373e4c786bfe989e637195252698f45b157a68)
1*6248d8ccSRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*6248d8ccSRob Herring (Arm)%YAML 1.2
3*6248d8ccSRob Herring (Arm)---
4*6248d8ccSRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/ti,omap4-wugen-mpu.yaml#
5*6248d8ccSRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6248d8ccSRob Herring (Arm)
7*6248d8ccSRob Herring (Arm)title: TI OMAP4 Wake-up Generator
8*6248d8ccSRob Herring (Arm)
9*6248d8ccSRob Herring (Arm)maintainers:
10*6248d8ccSRob Herring (Arm)  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11*6248d8ccSRob Herring (Arm)
12*6248d8ccSRob Herring (Arm)description: >
13*6248d8ccSRob Herring (Arm)  All TI OMAP4/5 (and their derivatives) are interrupt controllers that route
14*6248d8ccSRob Herring (Arm)  interrupts to the GIC, and also serve as wakeup sources. They are also
15*6248d8ccSRob Herring (Arm)  referred to as "WUGEN-MPU", hence the name of the binding.
16*6248d8ccSRob Herring (Arm)
17*6248d8ccSRob Herring (Arm)  Notes:
18*6248d8ccSRob Herring (Arm)
19*6248d8ccSRob Herring (Arm)    - Because this HW ultimately routes interrupts to the GIC, the interrupt
20*6248d8ccSRob Herring (Arm)      specifier must be that of the GIC.
21*6248d8ccSRob Herring (Arm)    - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs are
22*6248d8ccSRob Herring (Arm)      explicitly forbidden.
23*6248d8ccSRob Herring (Arm)
24*6248d8ccSRob Herring (Arm)properties:
25*6248d8ccSRob Herring (Arm)  compatible:
26*6248d8ccSRob Herring (Arm)    oneOf:
27*6248d8ccSRob Herring (Arm)      - items:
28*6248d8ccSRob Herring (Arm)          - const: ti,omap5-wugen-mpu
29*6248d8ccSRob Herring (Arm)          - const: ti,omap4-wugen-mpu
30*6248d8ccSRob Herring (Arm)      - const: ti,omap4-wugen-mpu
31*6248d8ccSRob Herring (Arm)
32*6248d8ccSRob Herring (Arm)  reg:
33*6248d8ccSRob Herring (Arm)    maxItems: 1
34*6248d8ccSRob Herring (Arm)
35*6248d8ccSRob Herring (Arm)  interrupt-controller: true
36*6248d8ccSRob Herring (Arm)
37*6248d8ccSRob Herring (Arm)  '#interrupt-cells':
38*6248d8ccSRob Herring (Arm)    const: 3
39*6248d8ccSRob Herring (Arm)
40*6248d8ccSRob Herring (Arm)required:
41*6248d8ccSRob Herring (Arm)  - compatible
42*6248d8ccSRob Herring (Arm)  - reg
43*6248d8ccSRob Herring (Arm)  - interrupt-controller
44*6248d8ccSRob Herring (Arm)  - '#interrupt-cells'
45*6248d8ccSRob Herring (Arm)
46*6248d8ccSRob Herring (Arm)additionalProperties: false
47*6248d8ccSRob Herring (Arm)
48*6248d8ccSRob Herring (Arm)examples:
49*6248d8ccSRob Herring (Arm)  - |
50*6248d8ccSRob Herring (Arm)    interrupt-controller@48281000 {
51*6248d8ccSRob Herring (Arm)        compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
52*6248d8ccSRob Herring (Arm)        reg = <0x48281000 0x1000>;
53*6248d8ccSRob Herring (Arm)        interrupt-controller;
54*6248d8ccSRob Herring (Arm)        #interrupt-cells = <3>;
55*6248d8ccSRob Herring (Arm)    };
56