Home
last modified time | relevance | path

Searched full:sm8650 (Results 1 – 25 of 45) sorted by relevance

12

/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8650-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
7 title: Qualcomm SM8650 Display MDSS
13 SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
20 const: qcom,sm8650-mdss
47 const: qcom,sm8650-dpu
54 const: qcom,sm8650-dp
62 - const: qcom,sm8650-dsi-ctrl
70 const: qcom,sm8650-dsi-phy-4nm
82 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
85 compatible = "qcom,sm8650-mdss";
[all …]
H A Ddp-controller.yaml32 - qcom,sm8650-dp
72 - const: qcom,sm8650-dp
298 - qcom,sm8650-dp
H A Dqcom,eliza-mdss.yaml305 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
389 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
409 compatible = "qcom,eliza-dp", "qcom,sm8650-dp";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux/drivers/clk/qcom/
H A Dtcsrcc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
151 { .compatible = "qcom,sm8650-tcsr" },
171 .name = "tcsr_cc-sm8650",
188 MODULE_DESCRIPTION("QTI TCSRCC SM8650 Driver");
H A Dgpucc-sm8650.c12 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
13 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
633 { .compatible = "qcom,sm8650-gpucc" },
655 .name = "sm8650-gpucc",
661 MODULE_DESCRIPTION("QTI GPU_CC SM8650 Driver");
H A DMakefile166 obj-$(CONFIG_SM_CAMCC_8650) += camcc-sm8650.o
191 obj-$(CONFIG_SM_GCC_8650) += gcc-sm8650.o
204 obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
209 obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
H A DKconfig1452 tristate "SM8650 Camera Clock Controller"
1457 Support for the camera clock controller on SM8650 devices.
1577 SAR2130P, SM8550 or SM8650 devices.
1715 tristate "SM8650 Global Clock Controller"
1720 Support for the global clock controller on SM8650 devices.
1846 tristate "SM8650 Graphics Clock Controller"
1851 Support for the graphics clock controller on SM8650 devices.
1885 tristate "SM8650 TCSR Clock Controller"
1890 Support for the TCSR clock controller on SM8650 devices.
1988 SM8550 or SM8650 or X1E80100 devices.
H A Dvideocc-sm8550.c11 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
579 { .compatible = "qcom,sm8650-videocc" },
596 if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) { in video_cc_sm8550_probe()
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml51 - qcom,sm8650-qmp-gen3x2-pcie-phy
52 - qcom,sm8650-qmp-gen4x2-pcie-phy
184 - qcom,sm8650-qmp-gen3x2-pcie-phy
185 - qcom,sm8650-qmp-gen4x2-pcie-phy
236 - qcom,sm8650-qmp-gen4x2-pcie-phy
262 - qcom,sm8650-qmp-gen4x2-pcie-phy
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml35 - const: qcom,sm8650-qmp-ufs-phy
61 - qcom,sm8650-qmp-ufs-phy
131 - qcom,sm8650-qmp-ufs-phy
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml22 - const: qcom,sm8650-qmp-usb3-dp-phy
43 - qcom,sm8650-qmp-usb3-dp-phy
219 - qcom,sm8650-qmp-usb3-dp-phy
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8450-camcc.yaml23 include/dt-bindings/clock/qcom,sm8650-camcc.h
35 - qcom,sm8650-camcc
77 - qcom,sm8650-camcc
H A Dqcom,sm8450-videocc.yaml23 include/dt-bindings/clock/qcom,sm8650-videocc.h
37 - qcom,sm8650-videocc
76 - qcom,sm8650-videocc
H A Dqcom,sm8550-dispcc.yaml15 domains on SM8550, SM8650, SM8750 and few other platforms.
21 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
33 - qcom,sm8650-dispcc
H A Dqcom,sm8550-tcsr.yaml22 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
37 - qcom,sm8650-tcsr
H A Dqcom,sm8450-gpucc.yaml28 include/dt-bindings/reset/qcom,sm8650-gpucc.h
45 - qcom,sm8650-gpucc
H A Dqcom,rpmhcc.yaml47 - qcom,sm8650-rpmh-clk
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8650.dtsi8 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
18 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
25 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
700 compatible = "qcom,scm-sm8650", "qcom,scm";
708 compatible = "qcom,sm8650-clk-virt";
[all …]
/linux/drivers/interconnect/qcom/
H A Dsm8650.c13 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
1916 { .compatible = "qcom,sm8650-aggre1-noc", .data = &sm8650_aggre1_noc },
1917 { .compatible = "qcom,sm8650-aggre2-noc", .data = &sm8650_aggre2_noc },
1918 { .compatible = "qcom,sm8650-clk-virt", .data = &sm8650_clk_virt },
1919 { .compatible = "qcom,sm8650-config-noc", .data = &sm8650_config_noc },
1920 { .compatible = "qcom,sm8650-cnoc-main", .data = &sm8650_cnoc_main },
1921 { .compatible = "qcom,sm8650-gem-noc", .data = &sm8650_gem_noc },
1922 { .compatible = "qcom,sm8650-lpass-ag-noc", .data = &sm8650_lpass_ag_noc },
1923 { .compatible = "qcom,sm8650-lpass-lpiaon-noc", .data = &sm8650_lpass_lpiaon_noc },
1924 { .compatible = "qcom,sm8650-lpass-lpicx-noc", .data = &sm8650_lpass_lpicx_noc },
[all …]
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/drivers/pinctrl/qcom/
H A DMakefile81 obj-$(CONFIG_PINCTRL_SM8650) += pinctrl-sm8650.o
82 obj-$(CONFIG_PINCTRL_SM8650_LPASS_LPI) += pinctrl-sm8650-lpass-lpi.o
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml48 - qcom,sm8650-ipcc
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-wsa-macro.yaml26 - qcom,sm8650-lpass-wsa-macro

12