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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
H A Dqcom,msm8998-bwmon.yaml40 - qcom,sm8650-cpu-bwmon
54 - qcom,sm8650-llcc-bwmon
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8650-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8650 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8650 SoC.
20 - const: qcom,sm8650-lpass-lpi-pinctrl
23 - const: qcom,sm8650-lpass-lpi-pinctrl
42 - $ref: "#/$defs/qcom-sm8650-lpass-state"
45 $ref: "#/$defs/qcom-sm8650-lpass-state"
49 qcom-sm8650-lpass-state:
94 compatible = "qcom,sm8650-lpass-lpi-pinctrl";
H A Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml43 - qcom,sm8650-qmp-gen3x2-pcie-phy
44 - qcom,sm8650-qmp-gen4x2-pcie-phy
166 - qcom,sm8650-qmp-gen3x2-pcie-phy
167 - qcom,sm8650-qmp-gen4x2-pcie-phy
217 - qcom,sm8650-qmp-gen4x2-pcie-phy
235 - qcom,sm8650-qmp-gen4x2-pcie-phy
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml31 - qcom,sm8650-qmp-usb3-dp-phy
135 - qcom,sm8650-qmp-usb3-dp-phy
H A Dqcom,snps-eusb2-phy.yaml23 - qcom,sm8650-snps-eusb2-phy
/linux/drivers/interconnect/qcom/
H A Dsm8650.c13 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
18 #include "sm8650.h"
1977 { .compatible = "qcom,sm8650-aggre1-noc", .data = &sm8650_aggre1_noc },
1978 { .compatible = "qcom,sm8650-aggre2-noc", .data = &sm8650_aggre2_noc },
1979 { .compatible = "qcom,sm8650-clk-virt", .data = &sm8650_clk_virt },
1980 { .compatible = "qcom,sm8650-config-noc", .data = &sm8650_config_noc },
1981 { .compatible = "qcom,sm8650-cnoc-main", .data = &sm8650_cnoc_main },
1982 { .compatible = "qcom,sm8650-gem-noc", .data = &sm8650_gem_noc },
1983 { .compatible = "qcom,sm8650-lpass-ag-noc", .data = &sm8650_lpass_ag_noc },
1984 { .compatible = "qcom,sm8650-lpass-lpiaon-noc", .data = &sm8650_lpass_lpiaon_noc },
[all …]
H A Dsm8650.h3 * SM8650 interconnect IDs
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8550-tcsr.yaml20 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
31 - qcom,sm8650-tcsr
H A Dqcom,rpmhcc.yaml42 - qcom,sm8650-rpmh-clk
/linux/drivers/clk/qcom/
H A DMakefile137 obj-$(CONFIG_SM_CAMCC_8650) += camcc-sm8650.o
161 obj-$(CONFIG_SM_GCC_8650) += gcc-sm8650.o
174 obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
178 obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
H A Dgpucc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
14 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
634 { .compatible = "qcom,sm8650-gpucc" },
656 .name = "sm8650-gpucc",
662 MODULE_DESCRIPTION("QTI GPU_CC SM8650 Driver");
H A DKconfig1051 tristate "SM8650 Camera Clock Controller"
1055 Support for the camera clock controller on SM8650 devices.
1154 SAR2130P, SM8550 or SM8650 devices.
1279 tristate "SM8650 Global Clock Controller"
1283 Support for the global clock controller on SM8650 devices.
1397 tristate "SM8650 Graphics Clock Controller"
1401 Support for the graphics clock controller on SM8650 devices.
1423 tristate "SM8650 TCSR Clock Controller"
1427 Support for the TCSR clock controller on SM8650 devices.
1515 SM8550 or SM8650 or X1E80100 devices.
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8650-lpass-lpi.c213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml42 - qcom,sm8650-llcc
277 - qcom,sm8650-llcc
/linux/sound/soc/qcom/
H A Dsc8280xp.c203 {.compatible = "qcom,sm8650-sndcard", "sm8650"},
/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml68 - qcom,sm8650-dwc3
368 - qcom,sm8650-dwc3
512 - qcom,sm8650-dwc3
H A Dqcom,snps-dwc3.yaml69 - qcom,sm8650-dwc3
354 - qcom,sm8650-dwc3
500 - qcom,sm8650-dwc3
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml42 - qcom,sm8650-ipcc
/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml64 - qcom,sm8650-smmu-500
109 - qcom,sm8650-smmu-500
538 - qcom,sm8650-smmu-500
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,aoss-qmp.yaml48 - qcom,sm8650-aoss-qmp
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,gpi.yaml41 - qcom,sm8650-gpi-dma
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml56 - qcom,sm8650-qfprom

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