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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
H A Dqcom,msm8998-bwmon.yaml41 - qcom,sm8650-cpu-bwmon
55 - qcom,sm8650-llcc-bwmon
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,sm8650-ufshc.yaml4 $id: http://devicetree.org/schemas/ufs/qcom,sm8650-ufshc.yaml#
7 title: Qualcomm SM8650 and Other SoCs UFS Controllers
19 - qcom,sm8650-ufshc
29 - qcom,sm8650-ufshc
74 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
75 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
79 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
87 compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8650-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
7 title: Qualcomm SM8650 Display DPU
20 - qcom,sm8650-dpu
69 compatible = "qcom,sm8650-dpu";
H A Ddp-controller.yaml32 - qcom,sm8650-dp
71 - const: qcom,sm8650-dp
280 - qcom,sm8650-dp
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml44 - qcom,sm8650-qmp-gen3x2-pcie-phy
45 - qcom,sm8650-qmp-gen4x2-pcie-phy
167 - qcom,sm8650-qmp-gen3x2-pcie-phy
168 - qcom,sm8650-qmp-gen4x2-pcie-phy
220 - qcom,sm8650-qmp-gen4x2-pcie-phy
246 - qcom,sm8650-qmp-gen4x2-pcie-phy
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml50 - qcom,sm8650-qmp-ufs-phy
118 - qcom,sm8650-qmp-ufs-phy
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8650-qrd.dts10 #include "sm8650.dtsi"
21 model = "Qualcomm Technologies, Inc. SM8650 QRD";
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
50 compatible = "qcom,sm8650-pmic-glink",
96 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
97 model = "SM8650-QRD";
823 firmware-name = "qcom/sm8650/ipa_fws.mbn";
836 firmware-name = "qcom/sm8650/gen70900_zap.mbn";
1019 firmware-name = "qcom/sm8650/adsp.mbn",
1020 "qcom/sm8650/adsp_dtb.mbn";
[all …]
H A Dsm8650-hdk.dts10 #include "sm8650.dtsi"
20 model = "Qualcomm Technologies, Inc. SM8650 HDK";
21 compatible = "qcom,sm8650-hdk", "qcom,sm8650";
89 compatible = "qcom,sm8650-pmic-glink",
161 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
162 model = "SM8650-HDK";
893 firmware-name = "qcom/sm8650/ipa_fws.mbn";
906 firmware-name = "qcom/sm8650/gen70900_zap.mbn";
1075 firmware-name = "qcom/sm8650/adsp.mbn",
1076 "qcom/sm8650/adsp_dtb.mbn";
[all …]
H A Dsm8650.dtsi8 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
18 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
25 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
644 compatible = "qcom,scm-sm8650", "qcom,scm";
652 compatible = "qcom,sm8650-clk-virt";
[all …]
H A DMakefile317 sm8650-hdk-display-card-dtbs := sm8650-hdk.dtb sm8650-hdk-display-card.dtbo
319 dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk-display-card.dtb
320 dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb
321 dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
322 dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
/linux/drivers/interconnect/qcom/
H A Dsm8650.c13 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
1916 { .compatible = "qcom,sm8650-aggre1-noc", .data = &sm8650_aggre1_noc },
1917 { .compatible = "qcom,sm8650-aggre2-noc", .data = &sm8650_aggre2_noc },
1918 { .compatible = "qcom,sm8650-clk-virt", .data = &sm8650_clk_virt },
1919 { .compatible = "qcom,sm8650-config-noc", .data = &sm8650_config_noc },
1920 { .compatible = "qcom,sm8650-cnoc-main", .data = &sm8650_cnoc_main },
1921 { .compatible = "qcom,sm8650-gem-noc", .data = &sm8650_gem_noc },
1922 { .compatible = "qcom,sm8650-lpass-ag-noc", .data = &sm8650_lpass_ag_noc },
1923 { .compatible = "qcom,sm8650-lpass-lpiaon-noc", .data = &sm8650_lpass_lpiaon_noc },
1924 { .compatible = "qcom,sm8650-lpass-lpicx-noc", .data = &sm8650_lpass_lpicx_noc },
[all …]
H A DMakefile45 qnoc-sm8650-objs := sm8650.o
89 obj-$(CONFIG_INTERCONNECT_QCOM_SM8650) += qnoc-sm8650.o
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8550-tcsr.yaml20 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
32 - qcom,sm8650-tcsr
H A Dqcom,sm8450-videocc.yaml19 include/dt-bindings/clock/qcom,sm8650-videocc.h
28 - qcom,sm8650-videocc
/linux/drivers/clk/qcom/
H A DMakefile138 obj-$(CONFIG_SM_CAMCC_8650) += camcc-sm8650.o
162 obj-$(CONFIG_SM_GCC_8650) += gcc-sm8650.o
175 obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
179 obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
H A Dgpucc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
14 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
634 { .compatible = "qcom,sm8650-gpucc" },
656 .name = "sm8650-gpucc",
662 MODULE_DESCRIPTION("QTI GPU_CC SM8650 Driver");
H A DKconfig1065 tristate "SM8650 Camera Clock Controller"
1069 Support for the camera clock controller on SM8650 devices.
1168 SAR2130P, SM8550 or SM8650 devices.
1293 tristate "SM8650 Global Clock Controller"
1297 Support for the global clock controller on SM8650 devices.
1411 tristate "SM8650 Graphics Clock Controller"
1415 Support for the graphics clock controller on SM8650 devices.
1437 tristate "SM8650 TCSR Clock Controller"
1441 Support for the TCSR clock controller on SM8650 devices.
1530 SM8550 or SM8650 or X1E80100 devices.
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8650-lpass-lpi.c213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");
H A DMakefile72 obj-$(CONFIG_PINCTRL_SM8650) += pinctrl-sm8650.o
73 obj-$(CONFIG_PINCTRL_SM8650_LPASS_LPI) += pinctrl-sm8650-lpass-lpi.o
/linux/Documentation/devicetree/bindings/firmware/
H A Dqcom,scm.yaml75 - qcom,scm-sm8650
211 - qcom,scm-sm8650
/linux/sound/soc/qcom/
H A Dsc8280xp.c177 {.compatible = "qcom,sm8650-sndcard", "sm8650"},
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml43 - qcom,sm8650-llcc
279 - qcom,sm8650-llcc

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