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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8650-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8650 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8650 SoC.
20 - const: qcom,sm8650-lpass-lpi-pinctrl
23 - const: qcom,sm8650-lpass-lpi-pinctrl
42 - $ref: "#/$defs/qcom-sm8650-lpass-state"
45 $ref: "#/$defs/qcom-sm8650-lpass-state"
49 qcom-sm8650-lpass-state:
94 compatible = "qcom,sm8650-lpass-lpi-pinctrl";
H A Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8650-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
7 title: Qualcomm SM8650 Display MDSS
13 SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
20 const: qcom,sm8650-mdss
43 const: qcom,sm8650-dpu
50 const: qcom,sm8650-dp
58 - const: qcom,sm8650-dsi-ctrl
66 const: qcom,sm8650-dsi-phy-4nm
80 compatible = "qcom,sm8650-mdss";
104 compatible = "qcom,sm8650-dpu";
[all …]
H A Ddsi-controller-main.yaml42 - qcom,sm8650-dsi-ctrl
360 - qcom,sm8650-dsi-ctrl
H A Ddp-controller.yaml31 - qcom,sm8650-dp
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8650-gcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8650
14 domains on SM8650
16 See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h
20 const: qcom,sm8650-gcc
49 compatible = "qcom,sm8650-gcc";
H A Dqcom,sm8450-videocc.yaml19 include/dt-bindings/clock/qcom,sm8650-videocc.h
27 - qcom,sm8650-videocc
/linux/drivers/clk/qcom/
H A Dtcsrcc-sm8650.c14 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
151 { .compatible = "qcom,sm8650-tcsr" },
164 .name = "tcsr_cc-sm8650",
181 MODULE_DESCRIPTION("QTI TCSRCC SM8650 Driver");
H A Dgpucc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
14 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
634 { .compatible = "qcom,sm8650-gpucc" },
656 .name = "sm8650-gpucc",
662 MODULE_DESCRIPTION("QTI GPU_CC SM8650 Driver");
H A Dvideocc-sm8550.c13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
534 { .compatible = "qcom,sm8650-videocc" },
559 if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) { in video_cc_sm8550_probe()
H A Ddispcc-sm8550.c1762 { .compatible = "qcom,sm8650-dispcc" },
1786 if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-dispcc")) { in disp_cc_sm8550_probe()
1832 MODULE_DESCRIPTION("QTI DISPCC SM8550 / SM8650 Driver");
H A Dcamcc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
3531 { .compatible = "qcom,sm8650-camcc" },
3583 .name = "camcc-sm8650",
3590 MODULE_DESCRIPTION("QTI CAMCC SM8650 Driver");
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8650-lpass-lpi.c213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");
H A DKconfig137 tristate "Qualcomm Technologies Inc SM8650 LPASS LPI pin controller driver"
143 (Low Power Island) found on the Qualcomm Technologies Inc SM8650
H A Dpinctrl-sm8650.c1735 { .compatible = "qcom,sm8650-tlmm", },
1741 .name = "sm8650-tlmm",
1760 MODULE_DESCRIPTION("QTI SM8650 TLMM driver");
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml31 - qcom,sm8650-qmp-usb3-dp-phy
135 - qcom,sm8650-qmp-usb3-dp-phy
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/drivers/interconnect/qcom/
H A Dsm8650.h3 * SM8650 interconnect IDs
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml41 - qcom,sm8650-ipcc
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,pmic-glink.yaml40 - qcom,sm8650-pmic-glink
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-wsa-macro.yaml23 - qcom,sm8650-lpass-wsa-macro
H A Dqcom,sm8250.yaml27 - qcom,sm8650-sndcard
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml53 - qcom,sm8650-qfprom
/linux/drivers/pmdomain/qcom/
H A Drpmhpd.c516 /* SM8650 RPMH powerdomains */
734 { .compatible = "qcom,sm8650-rpmhpd", .data = &sm8650_desc },

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