Home
last modified time | relevance | path

Searched full:sm6125 (Results 1 – 24 of 24) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6125-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml#
7 title: Qualcomm SM6125 Display MDSS
13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
20 const: qcom,sm6125-mdss
54 const: qcom,sm6125-dpu
63 - const: qcom,sm6125-dsi-ctrl
72 const: qcom,sm6125-dsi-phy-14nm
78 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
79 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
85 compatible = "qcom,sm6125-mdss";
[all …]
H A Dqcom,sc7180-dpu.yaml18 - qcom,sm6125-dpu
69 - qcom,sm6125-dpu
H A Ddsi-phy-14nm.yaml22 - qcom,sm6125-dsi-phy-14nm
H A Ddsi-controller-main.yaml32 - qcom,sm6125-dsi-ctrl
331 - qcom,sm6125-dsi-ctrl
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,dispcc-sm6125.yaml4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml#
7 title: Qualcomm Display Clock Controller on SM6125
14 on SM6125.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h
21 - qcom,sm6125-dispcc
77 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
80 compatible = "qcom,sm6125-dispcc";
H A Dqcom,gcc-sm6125.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6125
14 domains on SM6125.
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6125.h
20 const: qcom,gcc-sm6125
47 compatible = "qcom,gcc-sm6125";
H A Dqcom,sm6125-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6125
16 See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
21 - qcom,sm6125-gpucc
48 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
56 compatible = "qcom,sm6125-gpucc";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6125-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-tlmm.yaml#
6 title: Qualcomm Technologies, Inc. SM6125 TLMM block
12 Top Level Mode Multiplexer pin controller in Qualcomm SM6125 SoC.
19 const: qcom,sm6125-tlmm
38 - $ref: "#/$defs/qcom-sm6125-tlmm-state"
41 $ref: "#/$defs/qcom-sm6125-tlmm-state"
45 qcom-sm6125-tlmm-state:
106 compatible = "qcom,sm6125-tlmm";
/linux/drivers/clk/qcom/
H A Dgpucc-sm6125.c13 #include <dt-bindings/clock/qcom,sm6125-gpucc.h>
389 { .compatible = "qcom,sm6125-gpucc" },
418 .name = "gpucc-sm6125",
424 MODULE_DESCRIPTION("QTI GPUCC SM6125 Driver");
H A Ddispcc-sm6125.c11 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
670 { .compatible = "qcom,sm6125-dispcc" },
691 .name = "disp_cc-sm6125",
698 MODULE_DESCRIPTION("QTI DISPCC SM6125 Driver");
H A Dgcc-sm6125.c15 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
4130 { .compatible = "qcom,gcc-sm6125" },
4170 .name = "gcc-sm6125",
4187 MODULE_DESCRIPTION("QTI GCC SM6125 Driver");
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125-xiaomi-laurel-sprout.dts12 #include "sm6125.dtsi"
17 compatible = "xiaomi,laurel-sprout", "qcom,sm6125";
21 qcom,msm-id = <394 0>; /* sm6125 v1 */
H A Dsm6125-sony-xperia-seine-pdx201.dts8 #include "sm6125.dtsi"
16 qcom,msm-id = <394 0x10000>; /* sm6125 v1 */
20 compatible = "sony,pdx201", "qcom,sm6125";
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smd-rpm.yaml61 - qcom,rpm-sm6125
/linux/drivers/soc/qcom/
H A Dsmd-rpm.c240 { .compatible = "qcom,rpm-sm6125" },
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,rpm-proc.yaml91 - qcom,sm6125-rpm-proc
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.c174 { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm6125.c1259 { .compatible = "qcom,sm6125-tlmm", },
1265 .name = "sm6125-tlmm",
1284 MODULE_DESCRIPTION("QTI sm6125 TLMM driver");
/linux/drivers/gpu/drm/msm/
H A Dmsm_mdss.c748 { .compatible = "qcom,sm6125-mdss", .data = &sm6125_data },
/linux/drivers/pmdomain/qcom/
H A Drpmpd.c953 { .compatible = "qcom,sm6125-rpmpd", .data = &sm6125_desc },
/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy.c568 { .compatible = "qcom,sm6125-dsi-phy-14nm",
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_catalog.c694 * There are (at least) three SoCs implementing A610: SM6125
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c1507 { .compatible = "qcom,sm6125-dpu", .data = &dpu_sm6125_cfg, },
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-ufs.c2035 .compatible = "qcom,sm6125-qmp-ufs-phy",