Home
last modified time | relevance | path

Searched +full:quad +full:- +full:sgmii (Results 1 – 10 of 10) sorted by relevance

/linux/Documentation/hwmon/
H A Dbcm54140.rst1 .. SPDX-License-Identifier: GPL-2.0-only
3 Broadcom BCM54140 Quad SGMII/QSGMII PHY
15 -----------
17 The Broadcom BCM54140 is a Quad SGMII/QSGMII PHY which supports monitoring
21 Both voltages and the temperature are measured in a round-robin fashion.
24 -------------
/linux/Documentation/devicetree/bindings/net/
H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
[all …]
/linux/drivers/net/ethernet/qualcomm/emac/
H A Demac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
12 #include "emac-mac.h"
13 #include "emac-phy.h"
14 #include "emac-sgmii.h"
176 /* SGMII v2 per lane registers */
179 /* SGMII v2 PHY common registers */
183 /* SGMII v2 PHY registers per lane */
225 u64 rx_sz_65_127; /* packets that are 65-127 bytes */
226 u64 rx_sz_128_255; /* packets that are 128-255 bytes */
[all …]
/linux/drivers/net/phy/
H A Dbcm54140.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Broadcom BCM54140 Quad SGMII/QSGMII Copper/Fiber Gigabit PHY
14 #include "bcm-phy-lib.h"
16 /* RDB per-port registers
61 #define BCM54140_RDB_MON_CTRL_SEL_RR 3 /* meassure all round-robin */
62 #define BCM54140_RDB_MON_CTRL_PWR_DOWN BIT(0) /* power-down monitor */
81 * T = 413.35 - (0.49055 * bits[9:0])
83 #define BCM54140_HWMON_TO_TEMP(v) (413350L - (v) * 491)
84 #define BCM54140_HWMON_FROM_TEMP(v) DIV_ROUND_CLOSEST_ULL(413350L - (v), 491)
120 * pin choses between 4x SGMII and QSGMII mode:
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
40 Adds support for a set of LED trigger events per-PHY. Link
44 logical-or of all the link speed ones.
69 Currently tested with mpc866ads and mpc8349e-mitx.
121 - ADIN1200 - Robust,Industrial, Low Power 10/100 Ethernet PHY
122 - ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit
130 - ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY
144 Currently supports the Asix Electronics PHY found in the X-Surf 100
153 found in the X-Surf 100 AX88796B package.
170 Support the Broadcom BCM54140 Quad SGMII/QSGMII PHY.
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-puzzle-m801.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Device Tree file for IEI Puzzle-M801
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/leds/common.h>
15 model = "IEI-Puzzle-M801";
16 …compatible = "iei,puzzle-m801", "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada
28 stdout-path = "serial0:115200n8";
37 v_3_3: regulator-3-3v {
38 compatible = "regulator-fixed";
[all …]
H A Darmada-7040-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-7040.dtsi"
13 compatible = "marvell,armada7040-db", "marvell,armada7040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
31 cp0_exp_usb3_0_current_regulator: gpio-regulator {
32 compatible = "regulator-gpio";
33 regulator-name = "cp0-usb3-0-current-regulator";
34 regulator-type = "current";
[all …]
H A Darmada-8040-mcbin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-8040.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
15 "marvell,armada-ap806-quad", "marvell,armada-ap806";
18 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
37 regulator-min-microvolt = <3300000>;
[all …]
H A Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
37 cooling-levels = <0 51 102 153 204 255>;
38 #cooling-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2018-2021 NXP
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
38 stdout-path = "serial0:115200n8";
46 sys_mclk: clock-mclk {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <25000000>;
[all …]