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/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A D	memory.json	5 …ump (prediction=correct) for all data types excluding data prefetch (demand load,inst prefetch,ins… 6 …ip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate … 113 …his scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,ins… 119 … than Initial Pump Scope for all data types excluding data prefetch (demand load,inst prefetch,ins… 125 …nitial Pump Scope (Chip) for all data types excluding data prefetch (demand load,inst prefetch,ins… 126 …nitial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,ins… 155 "BriefDescription": "Local memory above theshold for data prefetch", 161 "BriefDescription": "Memory prefetch for this lpar. Includes L4", 167 …Reads from Memory from this lpar (includes data/inst/xlate/l1prefetch/inst prefetch). Includes L4", 185 …cross all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,ins… [all …]
H A D	frontend.json	89 …3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)", 90 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" 95 …3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)", 96 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" 101 …other chip's L4 on a different Node or Group (Distant) due to an instruction fetch (not prefetch)", 102 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" 107 …ther chip's memory on the same Node or Group (Distant) due to an instruction fetch (not prefetch)", 108 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" 113 …'s Instruction cache was reloaded from local core's L2 due to an instruction fetch (not prefetch)", 114 … core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" [all …]
H A D	other.json	23 …p pump (prediction=correct) for all data types (demand load,data prefetch,inst prefetch,inst fetch… 24 …ip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate … 29 …s this scope was group pump for all data types (demand load,data prefetch,inst prefetch,inst fetch… 30 …his scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,ins… 35 …ler than Initial Pump Scope for all data types (demand load,data prefetch,inst prefetch,inst fetch… 41 …n Initial Pump Scope (Chip) for all data types (demand load,data prefetch,inst prefetch,inst fetch… 42 …nitial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,ins… 47 …s across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch… 48 …across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,ins… 53 …s across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch… [all …]
/linux/tools/perf/pmu-events/arch/powerpc/power10/
H A D	datasource.json	55 …"BriefDescription": "All successful instruction (demand and prefetch) dispatches for this thread t… 70 …s instruction cache was reloaded from the local core's L2 due to a demand miss or prefetch reload." 75 …sor's L1 data cache was reloaded from the local core's L2 due to a demand miss or prefetch reload." 90 …che was reloaded from a source beyond the local core's L1 due to a demand miss or prefetch reload." 95 …che was reloaded from a source beyond the local core's L1 due to a demand miss or prefetch reload." 105 … with data NOT in the MEPF state from the local core's L2 due to a demand miss or prefetch reload." 115 …state without dispatch conflicts from the local core's L2 due to a demand miss or prefetch reload." 125 …ispatch conflict on ld-hit-store from the local core's L2 due to a demand miss or prefetch reload." 135 …conflict other than ld-hit-store from the local core's L2 due to a demand miss or prefetch reload." 150 …che was reloaded from a source beyond the local core's L2 due to a demand miss or prefetch reload." [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A D	memory.json	215 "BriefDescription": "Counts all demand & prefetch data reads", 225 "BriefDescription": "Counts all demand & prefetch data reads", 235 "BriefDescription": "Counts all demand & prefetch data reads", 245 "BriefDescription": "Counts all demand & prefetch data reads", 255 "BriefDescription": "Counts all demand & prefetch data reads", 265 "BriefDescription": "Counts all demand & prefetch data reads", 275 "BriefDescription": "Counts all demand & prefetch data reads", 285 "BriefDescription": "Counts all demand & prefetch data reads", 295 "BriefDescription": "Counts all demand & prefetch data reads", 305 "BriefDescription": "Counts all demand & prefetch dat [all...]
H A D	cache.json	25 "PublicDescription": "This event counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand; from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.", 189 "BriefDescription": "L2 prefetch requests that hit L2 cache", 193 "PublicDescription": "This event counts the number of requests from the L2 hardware prefetchers that hit L2 cache. L3 prefetch new types.", 198 "BriefDescription": "L2 prefetch requests that miss L2 cache", 483 "PublicDescription": "Counts all retired load uops. This event accounts for SW prefetch uops of PREFETCHNTA or PREFETCHT0/1/2 or PREFETCHW.", 555 "BriefDescription": "Demand and prefetch data reads", 559 "PublicDescription": "This event counts the demand and prefetch data reads. All Core Data Reads include cacheable Demands and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.", 667 "PublicDescription": "This event counts the number of offcore outstanding Demand Data Read transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor. See the corresponding Umask under OFFCORE_REQUESTS. Note: A prefetch promoted to Demand is counted from the promotion point.", 700 "BriefDescription": "Counts all demand & prefetch data reads have any response type.", 710 "BriefDescription": "Counts all demand & prefetch dat [all...]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A D	other.json	9 …o operation was committed because the oldest and uncommitted load/store/prefetch operation waits f… 12 …o operation was committed because the oldest and uncommitted load/store/prefetch operation waits f… 21 …instruction was committed because the oldest and uncommitted load/store/prefetch operation waits f… 24 …instruction was committed because the oldest and uncommitted load/store/prefetch operation waits f… 33 …instruction was committed because the oldest and uncommitted load/store/prefetch operation waits f… 36 …instruction was committed because the oldest and uncommitted load/store/prefetch operation waits f… 45 …unts every cycle that no instruction was committed due to the lack of an available prefetch port.", 48 …ounts every cycle that no instruction was committed due to the lack of an available prefetch port." 57 …"PublicDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by a software prefetch in… 60 …"BriefDescription": "This event counts the LD_COMP_WAIT_PFP_BUSY caused by a software prefetch ins… [all …]
H A D	cache.json	45 …"PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.", 48 … "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch." 51 …"PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.", 54 … "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch." 63 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.", 66 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch." 87 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch.", 90 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch." 105 …ns where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.", 108 …ons where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch." [all …]
/linux/drivers/net/wireless/mediatek/mt76/
H A D	mt792x_dma.c	90 #define PREFETCH(base, depth) ((base) << 16 \| (depth)) macro 95 mt76_wr(dev, MT_WFDMA0_RX_RING0_EXT_CTRL, PREFETCH(0x0000, 0x4)); in mt792x_dma_prefetch() 96 mt76_wr(dev, MT_WFDMA0_RX_RING1_EXT_CTRL, PREFETCH(0x0040, 0x4)); in mt792x_dma_prefetch() 97 mt76_wr(dev, MT_WFDMA0_RX_RING2_EXT_CTRL, PREFETCH(0x0080, 0x4)); in mt792x_dma_prefetch() 98 mt76_wr(dev, MT_WFDMA0_RX_RING3_EXT_CTRL, PREFETCH(0x00c0, 0x4)); in mt792x_dma_prefetch() 100 mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, PREFETCH(0x0100, 0x10)); in mt792x_dma_prefetch() 101 mt76_wr(dev, MT_WFDMA0_TX_RING1_EXT_CTRL, PREFETCH(0x0200, 0x10)); in mt792x_dma_prefetch() 102 mt76_wr(dev, MT_WFDMA0_TX_RING2_EXT_CTRL, PREFETCH(0x0300, 0x10)); in mt792x_dma_prefetch() 103 mt76_wr(dev, MT_WFDMA0_TX_RING3_EXT_CTRL, PREFETCH(0x0400, 0x10)); in mt792x_dma_prefetch() 104 mt76_wr(dev, MT_WFDMA0_TX_RING15_EXT_CTRL, PREFETCH(0x0500, 0x4)); in mt792x_dma_prefetch() [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	other.json	708 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 718 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 728 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 738 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 748 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 758 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 768 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 778 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 788 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… 798 …"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch request… [all …]
/linux/tools/perf/pmu-events/arch/x86/bonnell/
H A D	memory.json	91 "BriefDescription": "L1 hardware prefetch request", 94 "EventName": "PREFETCH.HW_PREFETCH", 99 "BriefDescription": "Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed", 102 "EventName": "PREFETCH.PREFETCHNTA", 110 "EventName": "PREFETCH.PREFETCHT0", 118 "EventName": "PREFETCH.PREFETCHT1", 126 "EventName": "PREFETCH.PREFETCHT2", 131 "BriefDescription": "Any Software prefetch", 134 "EventName": "PREFETCH.SOFTWARE_PREFETCH", 139 "BriefDescription": "Any Software prefetch", [all …]
/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A D	cache.json	113 "PublicDescription": "Level 1 data or unified cache preload or prefetch", 116 "BriefDescription": "Level 1 data or unified cache preload or prefetch" 119 "PublicDescription": "Level 1 data or unified cache refill, preload or prefetch", 122 "BriefDescription": "Level 1 data or unified cache refill, preload or prefetch" 149 "PublicDescription": "Level 1 prefetcher, load prefetch requests generated", 152 "BriefDescription": "Level 1 prefetcher, load prefetch requests generated" 155 "PublicDescription": "Level 1 prefetcher, load prefetch fills into the level 1 cache", 158 "BriefDescription": "Level 1 prefetcher, load prefetch fills into the level 1 cache" 161 "PublicDescription": "Level 1 prefetcher, load prefetch to level 2 generated", 164 "BriefDescription": "Level 1 prefetcher, load prefetch t [all...]
H A D	instruction.json	99 "PublicDescription": "Prefetch sent to L2.", 102 "BriefDescription": "Prefetch sent to L2." 105 …"PublicDescription": "Prefetch response received but was dropped since we don't support inflight u… 108 …"BriefDescription": "Prefetch response received but was dropped since we don't support inflight up… 111 "PublicDescription": "Prefetch request missed TLB.", 114 "BriefDescription": "Prefetch request missed TLB." 117 "PublicDescription": "Prefetch request dropped since duplicate was found in TLB.", 120 "BriefDescription": "Prefetch request dropped since duplicate was found in TLB." 123 "PublicDescription": "Prefetch request dropped since it was found in cache.", 126 "BriefDescription": "Prefetch request dropped since it was found in cache."
/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A D	cache.json	147 "EventName": "ls_pref_instr_disp.prefetch", 149 …"BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchT0 (m… 155 …"BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchW (mo… 161 …"BriefDescription": "Software prefetch instructions dispatched (speculative) of type PrefetchNTA (… 167 "BriefDescription": "Software prefetch instructions dispatched (speculative) of all types.", 173 …prefetches that did not fetch data outside of the processor core as the PREFETCH instruction saw a… 179 …prefetches that did not fetch data outside of the processor core as the PREFETCH instruction saw a… 191 "BriefDescription": "Software prefetch data cache fills from local L2 cache.", 197 …"BriefDescription": "Software prefetch data cache fills from L3 cache or different L2 cache in the… 203 …"BriefDescription": "Software prefetch data cache fills from cache of another CCX in the same NUMA… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	memory.json	239 "BriefDescription": "Counts all demand & prefetch data reads that miss in the L3.", 249 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the modified dat… 259 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and clean or shared … 269 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is retu… 279 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is retu… 289 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the data is retu… 299 "BriefDescription": "Counts all prefetch data reads that miss in the L3.", 309 …"BriefDescription": "Counts all prefetch data reads that miss the L3 and the modified data is tran… 319 …"BriefDescription": "Counts all prefetch data reads that miss the L3 and clean or shared data is t… 329 …"BriefDescription": "Counts all prefetch data reads that miss the L3 and the data is returned from… [all …]
/linux/include/linux/
H A D	prefetch.h	`20 prefetch(x) attempts to pre-emptively get the memory pointed to 22 prefetch(x) should not cause any kind of exception, prefetch(0) is 25 prefetch() should be defined by the architecture, if not, the 28 There are 2 prefetch() macros: 30 prefetch(x) - prefetches the cacheline at "x" for read 39 #define prefetch(x) __builtin_prefetch(x) macro 57 prefetch(cp); in prefetch_range() 64 prefetch(page); in prefetch_page_address()`
/linux/include/asm-generic/
H A D	xor.h	`8 #include <linux/prefetch.h> 316 prefetch(p2); in xor_8regs_p_2() 320 prefetch(p2+8); in xor_8regs_p_2() 344 prefetch(p2); in xor_8regs_p_3() 345 prefetch(p3); in xor_8regs_p_3() 349 prefetch(p2+8); in xor_8regs_p_3() 350 prefetch(p3+8); in xor_8regs_p_3() 377 prefetch(p2); in xor_8regs_p_4() 378 prefetch(p3); in xor_8regs_p_4() 379 prefetch(p4); in xor_8regs_p_4() [all …]`
/linux/arch/sparc/lib/
H A D	NG4copy_page.S	`18 prefetch [%o1 + 0x000], #n_reads_strong 19 prefetch [%o1 + 0x040], #n_reads_strong 20 prefetch [%o1 + 0x080], #n_reads_strong 21 prefetch [%o1 + 0x0c0], #n_reads_strong 23 prefetch [%o1 + 0x100], #n_reads_strong 24 prefetch [%o1 + 0x140], #n_reads_strong 25 prefetch [%o1 + 0x180], #n_reads_strong 26 prefetch [%o1 + 0x1c0], #n_reads_strong 55 prefetch [%o1 + 0x200], #n_reads_strong`
/linux/tools/perf/pmu-events/arch/x86/westmereex/
H A D	memory.json	481 "BriefDescription": "Offcore prefetch data requests satisfied by any DRAM", 491 "BriefDescription": "Offcore prefetch data requests that missed the LLC", 501 "BriefDescription": "Offcore prefetch data requests satisfied by the local DRAM", 511 "BriefDescription": "Offcore prefetch data requests satisfied by a remote DRAM", 521 "BriefDescription": "Offcore prefetch data reads satisfied by any DRAM", 531 "BriefDescription": "Offcore prefetch data reads that missed the LLC", 541 "BriefDescription": "Offcore prefetch data reads satisfied by the local DRAM", 551 "BriefDescription": "Offcore prefetch data reads satisfied by a remote DRAM", 561 "BriefDescription": "Offcore prefetch code reads satisfied by any DRAM", 571 "BriefDescription": "Offcore prefetch code reads that missed the LLC", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemex/
H A D	memory.json	473 "BriefDescription": "Offcore prefetch data requests satisfied by any DRAM", 483 "BriefDescription": "Offcore prefetch data requests that missed the LLC", 493 "BriefDescription": "Offcore prefetch data requests satisfied by the local DRAM", 503 "BriefDescription": "Offcore prefetch data requests satisfied by a remote DRAM", 513 "BriefDescription": "Offcore prefetch data reads satisfied by any DRAM", 523 "BriefDescription": "Offcore prefetch data reads that missed the LLC", 533 "BriefDescription": "Offcore prefetch data reads satisfied by the local DRAM", 543 "BriefDescription": "Offcore prefetch data reads satisfied by a remote DRAM", 553 "BriefDescription": "Offcore prefetch code reads satisfied by any DRAM", 563 "BriefDescription": "Offcore prefetch code reads that missed the LLC", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemep/
H A D	memory.json	473 "BriefDescription": "Offcore prefetch data requests satisfied by any DRAM", 483 "BriefDescription": "Offcore prefetch data requests that missed the LLC", 493 "BriefDescription": "Offcore prefetch data requests satisfied by the local DRAM", 503 "BriefDescription": "Offcore prefetch data requests satisfied by a remote DRAM", 513 "BriefDescription": "Offcore prefetch data reads satisfied by any DRAM", 523 "BriefDescription": "Offcore prefetch data reads that missed the LLC", 533 "BriefDescription": "Offcore prefetch data reads satisfied by the local DRAM", 543 "BriefDescription": "Offcore prefetch data reads satisfied by a remote DRAM", 553 "BriefDescription": "Offcore prefetch code reads satisfied by any DRAM", 563 "BriefDescription": "Offcore prefetch code reads that missed the LLC", [all …]
H A D	cache.json	147 "BriefDescription": "L1D prefetch load lock accepted in fill buffer", 179 "BriefDescription": "L1D hardware prefetch misses", 187 "BriefDescription": "L1D hardware prefetch requests", 195 "BriefDescription": "L1D hardware prefetch requests triggered", 326 "EventName": "L2_DATA_RQSTS.PREFETCH.E_STATE", 334 "EventName": "L2_DATA_RQSTS.PREFETCH.I_STATE", 342 "EventName": "L2_DATA_RQSTS.PREFETCH.MESI", 350 "EventName": "L2_DATA_RQSTS.PREFETCH.M_STATE", 358 "EventName": "L2_DATA_RQSTS.PREFETCH.S_STATE", 411 "BriefDescription": "L2 lines evicted by a prefetch request", [all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	cache.json	178 "BriefDescription": "Clean L2 cache lines evicted by L2 prefetch.", 186 "BriefDescription": "Dirty L2 cache lines evicted by L2 prefetch.", 554 "BriefDescription": "Demand and prefetch data reads.", 654 …"BriefDescription": "Counts demand & prefetch code reads that hit in the LLC and the snoop to one … 664 …"BriefDescription": "Counts demand & prefetch code reads that hit in the LLC and sibling core snoo… 674 …"BriefDescription": "Counts demand & prefetch code reads that hit in the LLC and the snoops sent t… 684 "BriefDescription": "Counts all demand & prefetch data reads.", 694 "BriefDescription": "Counts all demand & prefetch data reads that hit in the LLC.", 704 …"BriefDescription": "Counts demand & prefetch data reads that hit in the LLC and the snoop to one … 714 …"BriefDescription": "Counts demand & prefetch data reads that hit in the LLC and the snoops to sib… [all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen2/
H A D	memory.json	238 "BriefDescription": "Software Prefetch Instructions Dispatched (Speculative).", 244 …"BriefDescription": "Software Prefetch Instructions Dispatched (Speculative). PrefetchNTA instruct… 250 …"BriefDescription": "Software Prefetch Instructions Dispatched (Speculative). See docAPM3 PREFETCH… 254 "EventName": "ls_pref_instr_disp.prefetch", 256 …"BriefDescription": "Software Prefetch Instructions Dispatched (Speculative). Prefetch_T0_T1_T2. P… 262 …fetches that did not fetch data outside of the processor core. Software PREFETCH instruction saw a… 268 …fetches that did not fetch data outside of the processor core. Software PREFETCH instruction saw a… 274 …"BriefDescription": "Software Prefetch Data Cache Fills by Data Source. From DRAM (home node remot… 280 …"BriefDescription": "Software Prefetch Data Cache Fills by Data Source. From another cache (home n… 286 …"BriefDescription": "Software Prefetch Data Cache Fills by Data Source. DRAM or IO from this threa… [all …]
/linux/tools/perf/pmu-events/arch/x86/silvermont/
H A D	cache.json	24 …"PublicDescription": "This event counts the number of demand and prefetch transactions that the L2… 78 …ts the number of load ops retired that miss in L1 Data cache. Note that prefetch misses will not b… 121 … "BriefDescription": "Counts any code reads (demand & prefetch) that have any response type.", 131 "BriefDescription": "Counts any code reads (demand & prefetch) that miss L2.", 141 …"BriefDescription": "Counts any code reads (demand & prefetch) that hit in the other module where … 151 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 and the snoops to sibl… 161 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 with a snoop miss resp… 171 "BriefDescription": "Counts any data read (demand & prefetch) that have any response type.", 181 "BriefDescription": "Counts any data read (demand & prefetch) that miss L2.", 191 …"BriefDescription": "Counts any data read (demand & prefetch) that hit in the other module where m… [all …]

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