xref: /linux/tools/perf/pmu-events/arch/x86/bonnell/memory.json (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800) 
1052aa3ccSAndi Kleen[
2052aa3ccSAndi Kleen    {
3c42bee96SIan Rogers        "BriefDescription": "Nonzero segbase 1 bubble",
4*19121e87SIan Rogers        "Counter": "0,1",
5052aa3ccSAndi Kleen        "EventCode": "0x5",
6052aa3ccSAndi Kleen        "EventName": "MISALIGN_MEM_REF.BUBBLE",
7052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
8c42bee96SIan Rogers        "UMask": "0x97"
9052aa3ccSAndi Kleen    },
10052aa3ccSAndi Kleen    {
11c42bee96SIan Rogers        "BriefDescription": "Nonzero segbase load 1 bubble",
12*19121e87SIan Rogers        "Counter": "0,1",
13c42bee96SIan Rogers        "EventCode": "0x5",
14052aa3ccSAndi Kleen        "EventName": "MISALIGN_MEM_REF.LD_BUBBLE",
15052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
16c42bee96SIan Rogers        "UMask": "0x91"
17052aa3ccSAndi Kleen    },
18052aa3ccSAndi Kleen    {
19c42bee96SIan Rogers        "BriefDescription": "Load splits",
20*19121e87SIan Rogers        "Counter": "0,1",
21c42bee96SIan Rogers        "EventCode": "0x5",
22c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.LD_SPLIT",
23052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
24c42bee96SIan Rogers        "UMask": "0x9"
25052aa3ccSAndi Kleen    },
26052aa3ccSAndi Kleen    {
27c42bee96SIan Rogers        "BriefDescription": "Load splits (At Retirement)",
28*19121e87SIan Rogers        "Counter": "0,1",
29c42bee96SIan Rogers        "EventCode": "0x5",
30c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.LD_SPLIT.AR",
31c42bee96SIan Rogers        "SampleAfterValue": "200000",
32c42bee96SIan Rogers        "UMask": "0x89"
33c42bee96SIan Rogers    },
34c42bee96SIan Rogers    {
35c42bee96SIan Rogers        "BriefDescription": "Nonzero segbase ld-op-st 1 bubble",
36*19121e87SIan Rogers        "Counter": "0,1",
37c42bee96SIan Rogers        "EventCode": "0x5",
38052aa3ccSAndi Kleen        "EventName": "MISALIGN_MEM_REF.RMW_BUBBLE",
39052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
40c42bee96SIan Rogers        "UMask": "0x94"
41052aa3ccSAndi Kleen    },
42052aa3ccSAndi Kleen    {
43c42bee96SIan Rogers        "BriefDescription": "ld-op-st splits",
44*19121e87SIan Rogers        "Counter": "0,1",
45c42bee96SIan Rogers        "EventCode": "0x5",
46c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.RMW_SPLIT",
47052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
48c42bee96SIan Rogers        "UMask": "0x8c"
49052aa3ccSAndi Kleen    },
50052aa3ccSAndi Kleen    {
51c42bee96SIan Rogers        "BriefDescription": "Memory references that cross an 8-byte boundary.",
52*19121e87SIan Rogers        "Counter": "0,1",
53c42bee96SIan Rogers        "EventCode": "0x5",
54c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.SPLIT",
55052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
56c42bee96SIan Rogers        "UMask": "0xf"
57052aa3ccSAndi Kleen    },
58052aa3ccSAndi Kleen    {
59c42bee96SIan Rogers        "BriefDescription": "Memory references that cross an 8-byte boundary (At Retirement)",
60*19121e87SIan Rogers        "Counter": "0,1",
61c42bee96SIan Rogers        "EventCode": "0x5",
62c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.SPLIT.AR",
63052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
64c42bee96SIan Rogers        "UMask": "0x8f"
65052aa3ccSAndi Kleen    },
66052aa3ccSAndi Kleen    {
67c42bee96SIan Rogers        "BriefDescription": "Nonzero segbase store 1 bubble",
68*19121e87SIan Rogers        "Counter": "0,1",
69c42bee96SIan Rogers        "EventCode": "0x5",
70c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.ST_BUBBLE",
71052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
72c42bee96SIan Rogers        "UMask": "0x92"
73052aa3ccSAndi Kleen    },
74052aa3ccSAndi Kleen    {
75c42bee96SIan Rogers        "BriefDescription": "Store splits",
76*19121e87SIan Rogers        "Counter": "0,1",
77c42bee96SIan Rogers        "EventCode": "0x5",
78c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.ST_SPLIT",
79052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
80c42bee96SIan Rogers        "UMask": "0xa"
81052aa3ccSAndi Kleen    },
82052aa3ccSAndi Kleen    {
83c42bee96SIan Rogers        "BriefDescription": "Store splits (Ar Retirement)",
84*19121e87SIan Rogers        "Counter": "0,1",
85c42bee96SIan Rogers        "EventCode": "0x5",
86c42bee96SIan Rogers        "EventName": "MISALIGN_MEM_REF.ST_SPLIT.AR",
87c42bee96SIan Rogers        "SampleAfterValue": "200000",
88c42bee96SIan Rogers        "UMask": "0x8a"
89c42bee96SIan Rogers    },
90c42bee96SIan Rogers    {
91c42bee96SIan Rogers        "BriefDescription": "L1 hardware prefetch request",
92*19121e87SIan Rogers        "Counter": "0,1",
93c42bee96SIan Rogers        "EventCode": "0x7",
94052aa3ccSAndi Kleen        "EventName": "PREFETCH.HW_PREFETCH",
95052aa3ccSAndi Kleen        "SampleAfterValue": "2000000",
96c42bee96SIan Rogers        "UMask": "0x10"
97052aa3ccSAndi Kleen    },
98052aa3ccSAndi Kleen    {
99c42bee96SIan Rogers        "BriefDescription": "Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed",
100*19121e87SIan Rogers        "Counter": "0,1",
101c42bee96SIan Rogers        "EventCode": "0x7",
102c42bee96SIan Rogers        "EventName": "PREFETCH.PREFETCHNTA",
103c42bee96SIan Rogers        "SampleAfterValue": "200000",
104c42bee96SIan Rogers        "UMask": "0x88"
105c42bee96SIan Rogers    },
106c42bee96SIan Rogers    {
107c42bee96SIan Rogers        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed.",
108*19121e87SIan Rogers        "Counter": "0,1",
109c42bee96SIan Rogers        "EventCode": "0x7",
110c42bee96SIan Rogers        "EventName": "PREFETCH.PREFETCHT0",
111c42bee96SIan Rogers        "SampleAfterValue": "200000",
112c42bee96SIan Rogers        "UMask": "0x81"
113c42bee96SIan Rogers    },
114c42bee96SIan Rogers    {
115c42bee96SIan Rogers        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 instructions executed.",
116*19121e87SIan Rogers        "Counter": "0,1",
117c42bee96SIan Rogers        "EventCode": "0x7",
118c42bee96SIan Rogers        "EventName": "PREFETCH.PREFETCHT1",
119c42bee96SIan Rogers        "SampleAfterValue": "200000",
120c42bee96SIan Rogers        "UMask": "0x82"
121c42bee96SIan Rogers    },
122c42bee96SIan Rogers    {
123c42bee96SIan Rogers        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT2 instructions executed.",
124*19121e87SIan Rogers        "Counter": "0,1",
125c42bee96SIan Rogers        "EventCode": "0x7",
126c42bee96SIan Rogers        "EventName": "PREFETCH.PREFETCHT2",
127c42bee96SIan Rogers        "SampleAfterValue": "200000",
128c42bee96SIan Rogers        "UMask": "0x84"
129c42bee96SIan Rogers    },
130c42bee96SIan Rogers    {
131c42bee96SIan Rogers        "BriefDescription": "Any Software prefetch",
132*19121e87SIan Rogers        "Counter": "0,1",
133c42bee96SIan Rogers        "EventCode": "0x7",
134052aa3ccSAndi Kleen        "EventName": "PREFETCH.SOFTWARE_PREFETCH",
135052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
136c42bee96SIan Rogers        "UMask": "0xf"
137052aa3ccSAndi Kleen    },
138052aa3ccSAndi Kleen    {
139c42bee96SIan Rogers        "BriefDescription": "Any Software prefetch",
140*19121e87SIan Rogers        "Counter": "0,1",
141c42bee96SIan Rogers        "EventCode": "0x7",
142052aa3ccSAndi Kleen        "EventName": "PREFETCH.SOFTWARE_PREFETCH.AR",
143052aa3ccSAndi Kleen        "SampleAfterValue": "200000",
144c42bee96SIan Rogers        "UMask": "0x8f"
145c42bee96SIan Rogers    },
146c42bee96SIan Rogers    {
147c42bee96SIan Rogers        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed",
148*19121e87SIan Rogers        "Counter": "0,1",
149c42bee96SIan Rogers        "EventCode": "0x7",
150c42bee96SIan Rogers        "EventName": "PREFETCH.SW_L2",
151c42bee96SIan Rogers        "SampleAfterValue": "200000",
152c42bee96SIan Rogers        "UMask": "0x86"
153052aa3ccSAndi Kleen    }
154052aa3ccSAndi Kleen]
155