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/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dpmc.yaml4 $id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
17 example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
27 resume. The first two cells are as described for fsl,mpc8548-pmc. This
31 For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one
43 - const: fsl,mpc8315-pmc
44 - const: fsl,mpc8313-pmc
45 - const: fsl,mpc8349-pmc
49 - fsl,mpc8313-pmc
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H A Dpmc.txt4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Datmel,at91rm9200-pmc.yaml4 $id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
7 title: Atmel Power Management Controller (PMC)
14 system and user peripheral clocks. The PMC enables/disables the clock inputs
21 - const: atmel,at91sam9g20-pmc
22 - const: atmel,at91sam9260-pmc
26 - atmel,at91sam9g15-pmc
27 - atmel,at91sam9g25-pmc
28 - atmel,at91sam9g35-pmc
29 - atmel,at91sam9x25-pmc
30 - atmel,at91sam9x35-pmc
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/freebsd/sys/i386/i386/
H A Dperfmon.c125 perfmon_setup(int pmc, unsigned int control) in perfmon_setup() argument
129 if (pmc < 0 || pmc >= NPMC) in perfmon_setup()
132 perfmon_inuse |= (1 << pmc); in perfmon_setup()
135 ctl_shadow[pmc] = control; in perfmon_setup()
136 writectl(pmc); in perfmon_setup()
137 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0); in perfmon_setup()
143 perfmon_get(int pmc, unsigned int *control) in perfmon_get() argument
145 if (pmc < 0 || pmc >= NPMC) in perfmon_get()
148 if (perfmon_inuse & (1 << pmc)) { in perfmon_get()
149 *control = ctl_shadow[pmc]; in perfmon_get()
[all …]
/freebsd/lib/libpmc/
H A Dpmc.328 .Nm pmc
70 Orthogonal to PMC scope, PMCs may be allocated in one of two
85 The scope and operational mode for a software PMC are specified at
101 A process-scope PMC may be attached to those target processes
118 Process scope counting PMCs that have been configured to report PMC
127 The CPUs known to the PMC library are named by the
216 Supported PMC classes include:
248 .Ss PMC Capabilities
298 in the PMC library.
312 Returns a list of event names supported by a given PMC type.
[all …]
H A DMakefile1 PACKAGE=pmc
2 LIB_CXX=pmc
4 INCS= pmc.h pmclog.h pmcformat.h
46 MAN= pmc.3
61 MAN+= pmc.soft.3
63 # PMC-dependent manual pages
64 MAN+= pmc.amd.3
65 MAN+= pmc.atom.3
66 MAN+= pmc.atomsilvermont.3
67 MAN+= pmc.cmn-600.3
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H A Dpmc_capabilities.340 .Fn pmc_capabilities "pmc_id_t pmc" "uint32_t *caps"
50 .Fn pmc_width "pmc_id_t pmc" "uint32_t *width"
57 retrieves the hardware capabilities of a PMC.
59 .Fa pmc
60 is a PMC handle obtained by a prior call to
64 to a bit mask of capabilities supported by the PMC denoted by
66 .Fa pmc .
68 .Xr pmc 3 .
85 Specifies the number of PMC rows per CPU.
111 returns information about the current state of the PMC hardware
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H A Dpmc.dmc-620.328 .Nm pmc.dmc-620
51 .Ss PMC Capabilities
73 Two-bit value that controls direction of count for PMC.
92 The following PMC events are available:
125 .Xr pmc 3 ,
126 .Xr pmc.amd 3 ,
127 .Xr pmc.atom 3 ,
128 .Xr pmc.core 3 ,
129 .Xr pmc.core2 3 ,
130 .Xr pmc.corei7 3 ,
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H A Dpmc_allocate.345 .Fn pmc_release "pmc_id_t pmc"
57 comprises an PMC event name followed by an optional comma separated
64 .Xr pmc 3
67 The desired PMC mode is specified by argument
74 Allocate a system-scope counting PMC.
76 Allocate a system-scope sampling PMC.
78 Allocate a process-scope counting PMC.
80 Allocate a process-scope sampling PMC.
85 The flags supported at PMC allocation time are:
108 that the PMC is to be allocated on.
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H A Dpmc_attach.341 process scope PMC.
45 is used to attach a process scope PMC specified by argument
52 If the PMC was allocated with modifier
54 the PMC will additionally attach to current and future descendents of
56 The PMC should be in a quiescent state (i.e., not running).
60 is used to detach a process scope PMC specified by argument
77 specified a PMC that was not in a quiescent state.
81 is being tracked by another process scope PMC that uses the same PMC
84 The target process is already being tracked by the specified PMC.
88 specified a PMC with system scope.
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H A Dpmc_read.337 .Fn pmc_read "pmc_id_t pmc" "pmc_value_t *value"
39 .Fn pmc_rw "pmc_id_t pmc" "pmc_value_t newvalue" "pmc_value_t *oldvaluep"
41 .Fn pmc_write "pmc_id_t pmc" "pmc_value_t value"
43 These functions read and write the current value of a PMC.
47 will read the current value of the PMC specified by argument
48 .Fa pmc
54 will set the current value of the PMC specified by argument
55 .Fa pmc
63 For write operations the PMC should be a quiescent state.
70 A write operation specified a currently running PMC.
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H A Dpmc.ucf.328 .Nm pmc.ucf
37 Each fixed-function PMC measures a specific hardware event.
52 .Ss PMC Capabilities
83 .Xr pmc 3 ,
84 .Xr pmc.amd 3 ,
85 .Xr pmc.atom 3 ,
86 .Xr pmc.core 3 ,
87 .Xr pmc.core2 3 ,
88 .Xr pmc.corei7 3 ,
89 .Xr pmc.corei7uc 3 ,
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H A Dpmc_start.330 .Nd start and stop a PMC
36 .Fn pmc_start "pmc_id_t pmc"
38 .Fn pmc_stop "pmc_id_t pmc"
40 These functions are used to start and stop a PMC.
44 starts the PMC specified by argument
45 .Fa pmc .
46 If the specified PMC has process scope and has not been attached
51 stops the PMC specified by argument
52 .Fa pmc .
61 specified a PMC that requires a log file and no log file was
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H A Dpmc.soft.328 .Nm pmc.soft
36 .Ss PMC Features
86 .Xr pmc 3 ,
87 .Xr pmc.amd 3 ,
88 .Xr pmc.atom 3 ,
89 .Xr pmc.core 3 ,
90 .Xr pmc.corei7 3 ,
91 .Xr pmc.corei7uc 3 ,
92 .Xr pmc.iaf 3 ,
93 .Xr pmc.tsc 3 ,
[all …]
H A Dpmc.haswelluc.329 .Nm pmc.haswelluc
67 .Xr pmc.ucf 3 .
90 Configure the PMC to increment only if the number of configured
94 Configure the PMC to count the number of de-asserted to asserted
197 .Xr pmc 3 ,
198 .Xr pmc.amd 3 ,
199 .Xr pmc.atom 3 ,
200 .Xr pmc.core 3 ,
201 .Xr pmc.corei7 3 ,
202 .Xr pmc.corei7uc 3 ,
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H A Dpmc_get_msr.329 .Nd x86 architecture-specific PMC operations
35 .Fn pmc_get_msr "pmc_id_t pmc" "uint32_t *msr"
40 a PMC for subsequent use with RDPMC instructions.
42 .Fa pmc
43 specifies a process scope counting PMC.
45 with the PMC to the location pointed to by argument
49 can directly read the contents of PMC hardware using
59 The PMC handle specified was invalid.
61 The PMC specified did not have process scope or counting mode.
63 The PMC specified was allocated with the
[all …]
/freebsd/share/man/man4/
H A Dhwpmc.483 Subsequent operations on the allocated PMC use this handle to denote
84 the specific PMC.
85 A process that has successfully allocated a PMC is termed an
91 The PMC is active only when a thread belonging
94 The PMC operates independently of processes and
115 Scope and operational mode are orthogonal; a PMC may thus be
125 Applications can read the value of the PMC anytime using the
135 operation prior to starting the PMC.
155 operation prior to starting the PMC.
175 Stopping and starting a PMC is permitted at any time the owner process
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/freebsd/sys/sys/
H A Dpmc.h58 * example, when support for a new PMC type is added.
77 * some way for PMC operations. CPU names are grouped by manufacturer
81 * Please keep the pmc(3) manual page in sync with this list.
169 * A PMC can be in the following states:
178 * holds the number of CPUs using this PMC at
208 * An allocated PMC may used as a 'global' counter or as a
210 * statistical sampling mode or in counting mode. Thus a PMC in use
217 * Statistical profiling modes rely on the PMC periodically delivering
219 * been measured), so the PMC must have the ability to generate
222 * In counting modes, the PMC counts its configured events, with the
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama7g5.dtsi37 clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
205 clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
223 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
254 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
257 pmc: clock-controller@e0018000 { label
258 compatible = "microchip,sama7g5-pmc", "syscon";
328 …clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 9…
336 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
356 clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>;
371 clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
[all …]
H A Dsama7d65.dtsi33 clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
80 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
106 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
113 pmc: clock-controller@e0018000 { label
114 compatible = "microchip,sama7d65-pmc", "syscon";
185 clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
187 assigned-clocks = <&pmc PMC_TYPE_GCK 58>;
189 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
201 clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
203 assigned-clocks = <&pmc PMC_TYPE_GCK 59>;
[all …]
H A Dsama5d2.dtsi50 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
66 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
136 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
145 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
154 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
179 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
198 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
200 assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
209 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
211 assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
[all …]
H A Dsam9x7.dtsi77 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
79 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
88 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
90 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
108 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
115 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
139 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
160 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
181 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
188 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
[all …]
H A Dsam9x60.dtsi84 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
86 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
95 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
104 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
106 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
124 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
141 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
143 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
152 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
154 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
[all …]
/freebsd/sys/dev/hwpmc/
H A Dhwpmc_mod.c47 #include <sys/pmc.h>
102 pmc_value_t *pmc_pcpu_saved; /* saved PMC values: CSW handling */
107 static int *pmc_pmcdisp; /* PMC row dispositions */
118 KASSERT(pmc_pmcdisp[(R)] <= 0, ("[pmc,%d] row disposition error", \
122 ("[pmc,%d] row disposition error", __LINE__)); \
127 KASSERT(pmc_pmcdisp[(R)] <= 0, ("[pmc,%d] row disposition error", \
132 KASSERT(pmc_pmcdisp[(R)] >= 0, ("[pmc,%d] row disposition error", \
139 KASSERT(pmc_pmcdisp[(R)] >= 0, ("[pmc,%d] row disposition error", \
161 * Hash table of PMC owner descriptors. This table is protected by
162 * the shared PMC "sx" lock.
[all …]
/freebsd/usr.sbin/pmccontrol/
H A Dpmccontrol.832 .Oo Fl c Ar cpu | Fl d Ar pmc | Fl e Ar pmc Oc ...
60 .It Fl d Ar pmc
61 Disable PMC number
62 .Ar pmc
67 .Ar pmc
68 is a number denoting a specific PMC, or
74 .It Fl e Ar pmc
75 Enable PMC number
76 .Ar pmc ,
81 .Ar pmc
[all …]

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