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/linux/drivers/net/ethernet/mscc/
H A Docelot_police.c27 u32 cir = 0, cbs = 0, pir = 0, pbs = 0; in qos_policer_conf_set() local
33 pir = conf->pir; in qos_policer_conf_set()
60 pir += conf->cir; in qos_policer_conf_set()
63 if (pir == 0 && pbs == 0) { in qos_policer_conf_set()
64 /* Discard PIR frames */ in qos_policer_conf_set()
67 pir = DIV_ROUND_UP(pir, 100); in qos_policer_conf_set()
68 pir *= 3; /* 33 1/3 kbps */ in qos_policer_conf_set()
75 if (pir >= 100) { in qos_policer_conf_set()
77 pir = DIV_ROUND_UP(pir, 100); in qos_policer_conf_set()
78 pir *= 3; /* 33 1/3 fps */ in qos_policer_conf_set()
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H A Docelot_police.h29 u32 pir; /* PIR in kbps/fps */ member
/linux/arch/x86/kvm/vmx/
H A Dcommon.h117 * The vector of the virtual has already been set in the PIR. in kvm_vcpu_trigger_posted_interrupt()
121 * which case the PIR will be synced to the vIRR before in kvm_vcpu_trigger_posted_interrupt()
131 * PIR will be synced to the vIRR before re-entering the guest. in kvm_vcpu_trigger_posted_interrupt()
136 * has already synced PIR to vIRR and never blocks the vCPU if in kvm_vcpu_trigger_posted_interrupt()
138 * not wait for any requested interrupts in PIR, and sending a in kvm_vcpu_trigger_posted_interrupt()
156 * Post an interrupt to a vCPU's PIR and trigger the vCPU to process the
172 * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a in __vmx_deliver_posted_interrupt()
H A Dposted_intr.c239 * the cost of propagating PIR.IRR to PID.ON is negligible compared to in vmx_vcpu_pi_put()
280 memset(pi->pir, 0, sizeof(pi->pir)); in pi_apicv_pre_state_restore()
H A Dposted_intr.h26 vec = find_last_bit(pi_desc->pir, 256); in pi_find_highest_vector()
/linux/arch/powerpc/platforms/powernv/
H A Dopal-core.c36 /* PIR value of crashing CPU */
111 static void __init fill_prstatus(struct elf_prstatus *prstatus, int pir, in fill_prstatus() argument
118 * Overload PID with PIR value. in fill_prstatus()
119 * As a PIR value could also be '0', add an offset of '100' in fill_prstatus()
120 * to every PIR to avoid misinterpretations in GDB. in fill_prstatus()
122 prstatus->common.pr_pid = cpu_to_be32(100 + pir); in fill_prstatus()
129 if (pir == oc_conf->crashing_cpu) { in fill_prstatus()
260 thread_pir = be32_to_cpu(thdr->pir); in opalcore_append_cpu_notes()
262 pr_debug("[%04d] PIR: 0x%x, core state: 0x%02x\n", in opalcore_append_cpu_notes()
277 pr_debug("PIR 0x%x - R1 : 0x%llx, NIP : 0x%llx\n", thread_pir, in opalcore_append_cpu_notes()
H A Dopal-fadump.c462 thread_pir = be32_to_cpu(thdr->pir); in opal_fadump_build_cpu_notes()
463 pr_debug("[%04d] PIR: 0x%x, core state: 0x%02x\n", in opal_fadump_build_cpu_notes()
476 pr_debug("Crashing CPU PIR: 0x%x - R1 : 0x%lx, NIP : 0x%lx\n", in opal_fadump_build_cpu_notes()
494 pr_debug("CPU PIR: 0x%x - R1 : 0x%lx, NIP : 0x%lx\n", in opal_fadump_build_cpu_notes()
589 * CPU's PIR instead to plug the appropriate register data for in opal_fadump_trigger()
H A Dopal-hmi.c79 printk("%s CPU PIR: %08x\n", level, in print_core_checkstop_reason()
80 be32_to_cpu(hmi_evt->u.xstop_error.u.pir)); in print_core_checkstop_reason()
H A Dopal-fadump.h59 __be32 pir; member
/linux/drivers/iio/proximity/
H A DKconfig36 tristate "Nicera (Nippon Ceramic Co.) D3-323-AA PIR sensor"
39 Say Y here to build a driver for the Nicera D3-323-AA PIR sensor.
59 tristate "Murata IRS-D200 PIR sensor"
65 Say Y here to build a driver for the Murata IRS-D200 PIR sensor.
/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dmurata,irsd200.yaml7 title: Murata IRS-D200 PIR sensor
13 PIR sensor for human detection.
H A Dnicera,d3323aa.yaml7 title: Nicera D3-323-AA PIR sensor
13 PIR sensor for human detection.
/linux/arch/powerpc/include/uapi/asm/
H A Dkvm_para.h46 __u32 pir; member
77 /* MASn, ESR, PIR, and high SPRGs */
H A Dkvm.h79 * PIR
196 __u32 pir; /* read-only */ member
/linux/arch/x86/kernel/
H A Dirq.c416 static __always_inline bool handle_pending_pir(unsigned long *pir, struct pt_regs *regs) in handle_pending_pir() argument
421 if (!pi_harvest_pir(pir, pir_copy)) in handle_pending_pir()
457 if (!handle_pending_pir(pid->pir, regs)) in DEFINE_IDTENTRY_SYSVEC()
469 * process PIR bits one last time such that handling the new interrupts in DEFINE_IDTENTRY_SYSVEC()
472 handle_pending_pir(pid->pir, regs); in DEFINE_IDTENTRY_SYSVEC()
/linux/arch/powerpc/kernel/
H A Dhead_64.S63 * generic_secondary_smp_init, with PIR in r3.
65 * directed by the "start-cpu" RTS call, with PIR in r3.
71 * is at generic_secondary_smp_init, with PIR in r3.
282 * Fix PIR to match the linear numbering in the device tree.
284 * On e6500, the reset value of PIR uses the low three bits for
292 * scenario, and PIR is already set to the correct value. This
296 * at the old PIR value which state it's in, since the same value
/linux/arch/powerpc/kvm/
H A De500_emulate.c67 int pir = param & PPC_DBELL_PIR_MASK; in kvmppc_e500_emul_msgsnd() local
75 int cpir = cvcpu->arch.shared->pir; in kvmppc_e500_emul_msgsnd()
76 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) { in kvmppc_e500_emul_msgsnd()
H A Demulate.c111 /* PIR can legally be written, but we ignore it */ in kvmppc_emulate_mtspr()
H A Dmpic.c217 uint32_t pir; /* Processor initialization register */ member
521 opp->pir = 0; in openpic_reset()
718 case 0x1090: /* PIR */ in openpic_gbl_write()
766 case 0x1090: /* PIR */ in openpic_gbl_read()
/linux/arch/x86/kvm/
H A Dlapic.h109 bool __kvm_apic_update_irr(unsigned long *pir, void *regs, int *max_irr);
110 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, unsigned long *pir, int *max_irr);
/linux/drivers/net/ethernet/renesas/
H A Dsh_eth.h62 PIR, enumerator
205 /* PIR */
/linux/Documentation/virt/kvm/
H A Dvcpu-requests.rst271 role of ``vcpu->requests``. When sending a posted interrupt, PIR.ON is
273 vmx_sync_pir_to_irr() reads PIR after setting ``vcpu->mode`` to
/linux/arch/powerpc/include/asm/
H A Ddbell.h107 * by PIR/get_hard_smp_processor_id.
/linux/arch/x86/pci/
H A Dirq.c103 * $PIR format and a $IRT table is therefore there in some systems that
104 * lack a $PIR table.
113 * Unlike with the $PIR table there is no alignment guarantee.
116 * convert to the $PIR one, which we do here, except that obviously we
123 * in a $PIR table provided elsewhere. In that case this code will not
124 * be reached though as the $PIR table will have been chosen instead.
/linux/arch/powerpc/sysdev/
H A Dmpic.c1908 u32 pir; in mpic_reset_core() local
1913 pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); in mpic_reset_core()
1914 pir |= (1 << cpuid); in mpic_reset_core()
1915 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()
1919 pir &= ~(1 << cpuid); in mpic_reset_core()
1920 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()

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