Searched full:ocm (Results 1 – 18 of 18) sorted by relevance
3 * Xilinx ZynqMP OCM ECC Driver70 #define EDAC_DEVICE "ZynqMP-OCM"99 * struct edac_priv - OCM private instance data100 * @baseaddr: Base address of the OCM126 * @base: Pointer to the base address of the OCM127 * @p: Pointer to the OCM ECC status structure153 * @p: Pointer to the OCM ECC status structure211 * @base: Pointer to the OCM base address246 * echo <fault_count val> > /sys/kernel/debug/edac/ocm/inject_fault_count248 * echo <bit_pos val> > /sys/kernel/debug/edac/ocm/inject_ce_bitpos[all …]
18 /* ---------- OCM stuff ---------- */51 * OCM directory default60 * OCM directory Entries default108 * asd_read_ocm_seg - read an on chip memory (OCM) segment111 * @offs: offset into OCM where to read from134 ASD_DPRINTK("couldn't read ocm segment\n"); in asd_read_ocm_dir()139 ASD_DPRINTK("no valid dir signature(%c%c) at start of OCM\n", in asd_read_ocm_dir()144 asd_printk("unsupported major version of ocm dir:0x%x\n", in asd_read_ocm_dir()153 * asd_write_ocm_seg - write an on chip memory (OCM) segment156 * @offs: offset into OCM to write to[all …]
174 /* MBAR1 will point to OCM (On Chip Memory) */ in asd_init_sw()628 asd_printk("couldn't read ocm(%d)\n", err); in asd_init_hw()630 * couldn't read the OCM. */ in asd_init_hw()
1953 /* OCM base address */
7 title: Xilinx Zynqmp OCM(On-Chip Memory) Controller14 The OCM supports 64-bit wide ECC functionality to detect multi-bit errors
95 OCM: ocm@400040000 { label96 compatible = "ibm,ocm";137 descriptor-memory = "ocm";
233 struct __ocm ocm; member547 struct __ocm *ocm = &entry->region.ocm; in qlcnic_dump_ocm() local549 addr = adapter->ahw->pci_base0 + ocm->read_addr; in qlcnic_dump_ocm()550 for (i = 0; i < ocm->no_ops; i++) { in qlcnic_dump_ocm()553 addr += ocm->read_addr_stride; in qlcnic_dump_ocm()555 return ocm->no_ops * sizeof(u32); in qlcnic_dump_ocm()
265 /* OCM RAM TA */267 /* OCM ROM TA */
60 448: ocm reset
111 /* Wait for the OCM (On Chip Microcontroller) to start */ in anx7428_probe()
201 ocm: sram@fffc0000 { label207 ocm-sram@0 {
116 the RPU can execute instructions and access data from the OCM memory,
344 /* Read OCM */
125 …| OCM (other) | 9 | ERR0 | 0 | 0 …127 …| OCM (other) | 9 | ERR1 | 1 | 0 …129 …| OCM (other) | 9 | ERR2 | 2 | 0 …
931 /* Read OCM */
1509 /* Read OCM Header */
2235 /* Reading OCM memory */
29293 XILINX ZYNQMP OCM EDAC DRIVER