Home
last modified time | relevance | path

Searched full:mt7988 (Results 1 – 25 of 34) sorted by relevance

12

/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,mt7988-xfi-tphy.yaml4 $id: http://devicetree.org/schemas/phy/mediatek,mt7988-xfi-tphy.yaml#
7 title: MediaTek MT7988 XFI T-PHY
15 MediaTek's 10G-capabale MT7988 SoC.
20 const: mediatek,mt7988-xfi-tphy
42 One instance of the T-PHY on MT7988 suffers from a performance
45 is required for XFI Port0 of the MT7988 SoC to be in compliance with
63 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
69 compatible = "mediatek,mt7988-xfi-tphy";
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt7988-ethwarp.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
7 title: MediaTek MT7988 ethwarp Controller
13 The Mediatek MT7988 ethwarp controller provides clocks and resets for the
14 Ethernet related subsystems found the MT7988 SoC.
20 - const: mediatek,mt7988-ethwarp
47 compatible = "mediatek,mt7988-ethwarp";
H A Dmediatek,mt7988-xfi-pll.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-xfi-pll.yaml#
7 title: MediaTek MT7988 XFI PLL Clock Controller
18 const: mediatek,mt7988-xfi-pll
43 compatible = "mediatek,mt7988-xfi-pll";
H A Dmediatek,topckgen.yaml42 - mediatek,mt7988-mcusys
43 - mediatek,mt7988-topckgen
H A Dmediatek,ethsys.yaml25 - mediatek,mt7988-ethsys
H A Dmediatek,apmixedsys.yaml26 - mediatek,mt7988-apmixedsys
H A Dmediatek,infracfg.yaml35 - mediatek,mt7988-infracfg
/linux/drivers/clk/mediatek/
H A Dclk-mt7988-eth.c16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
17 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
131 { .compatible = "mediatek,mt7988-ethsys", .data = &ethdma_desc },
132 { .compatible = "mediatek,mt7988-sgmiisys0", .data = &sgmii0_desc },
133 { .compatible = "mediatek,mt7988-sgmiisys1", .data = &sgmii1_desc },
134 { .compatible = "mediatek,mt7988-ethwarp", .data = &ethwarp_desc },
141 .name = "clk-mt7988-eth",
149 MODULE_DESCRIPTION("MediaTek MT7988 Ethernet clocks driver");
H A Dclk-mt7988-xfipll.c13 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
66 { .compatible = "mediatek,mt7988-xfi-pll", .data = &xfipll_desc },
73 .name = "clk-mt7988-xfipll",
81 MODULE_DESCRIPTION("MediaTek MT7988 XFI PLL clock driver");
H A Dclk-mt7988-apmixed.c17 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
75 { .compatible = "mediatek,mt7988-apmixedsys" },
109 .name = "clk-mt7988-apmixed",
115 MODULE_DESCRIPTION("MediaTek MT7988 apmixedsys clocks driver");
H A Dclk-mt7988-infracfg.c16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
17 #include <dt-bindings/reset/mediatek,mt7988-resets.h>
284 { .compatible = "mediatek,mt7988-infracfg", .data = &infra_desc },
291 .name = "clk-mt7988-infracfg",
299 MODULE_DESCRIPTION("MediaTek MT7988 infracfg clocks driver");
H A DMakefile70 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-apmixed.o
71 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-topckgen.o
72 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-infracfg.o
73 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-eth.o
74 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-xfipll.o
H A Dclk-mt7988-topckgen.c16 #include <dt-bindings/clock/mediatek,mt7988-clk.h>
310 { .compatible = "mediatek,mt7988-topckgen", .data = &topck_desc },
311 { .compatible = "mediatek,mt7988-mcusys", .data = &mcusys_desc },
320 .name = "clk-mt7988-topckgen",
326 MODULE_DESCRIPTION("MediaTek MT7988 top clock generators driver");
/linux/Documentation/devicetree/bindings/net/pcs/
H A Dmediatek,sgmiisys.yaml30 - mediatek,mt7988-sgmiisys0
31 - mediatek,mt7988-sgmiisys1
50 const: mediatek,mt7988-sgmii
79 - mediatek,mt7988-sgmiisys0
80 - mediatek,mt7988-sgmiisys1
/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt7986-afe.yaml19 - mediatek,mt7988-afe
108 const: mediatek,mt7988-afe
/linux/drivers/net/dsa/
H A DKconfig45 MT7621ST and MT7623AI SoCs, and built-in switch in MT7988 SoC are
66 in the MediaTek MT7988 SoC.
H A Dmt7530-mmio.c15 { .compatible = "mediatek,mt7988-switch", .data = &mt753x_table[ID_MT7988], },
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed_wo.h94 #define MT7988_FIRMWARE_WO0 "mediatek/mt7988/mt7988_wo_0.bin"
95 #define MT7988_FIRMWARE_WO1 "mediatek/mt7988/mt7988_wo_1.bin"
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml23 The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
92 Built-in switch of the MT7988 SoC
93 const: mediatek,mt7988-switch
292 - mediatek,mt7988-switch
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mt7986-wo-ccif.yaml23 - mediatek,mt7988-wo-ccif
/linux/Documentation/devicetree/bindings/watchdog/
H A Dmediatek,mtk-wdt.yaml28 - mediatek,mt7988-wdt
/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,mt2712-pwm.yaml27 - mediatek,mt7988-pwm
/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7622-wed.yaml25 - mediatek,mt7988-wed
/linux/Documentation/devicetree/bindings/nvmem/
H A Dmediatek,efuse.yaml33 - mediatek,mt7988-efuse
/linux/Documentation/devicetree/bindings/serial/
H A Dmediatek,uart.yaml41 - mediatek,mt7988-uart

12