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12

/freebsd/sys/geom/raid/
H A Dmd_sii.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
50 uint64_t total_sectors; /* 54 - 57 */
56 uint8_t timestamp[6]; /* 134 - 136 */
74 uint64_t rebuild_lba; /* 142 - 145 */
75 uint32_t generation; /* 146 - 147 */
93 uint8_t name[16]; /* 151 - 158 */
156 (long long unsigned)meta->total_sectors); in g_raid_md_sii_print()
157 printf("product_id 0x%04x\n", meta->product_id); in g_raid_md_sii_print()
[all …]
H A Dmd_nvidia.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
160 printf("nvidia_id <%.8s>\n", meta->nvidia_id); in g_raid_md_nvidia_print()
161 printf("config_size %u\n", meta->config_size); in g_raid_md_nvidia_print()
162 printf("checksum 0x%08x\n", meta->checksum); in g_raid_md_nvidia_print()
163 printf("version 0x%04x\n", meta->version); in g_raid_md_nvidia_print()
164 printf("disk_number %d\n", meta->disk_number); in g_raid_md_nvidia_print()
165 printf("dummy_0 0x%02x\n", meta->dummy_0); in g_raid_md_nvidia_print()
166 printf("total_sectors %u\n", meta->total_sectors); in g_raid_md_nvidia_print()
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H A Dmd_jmicron.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
148 printf("signature <%c%c>\n", meta->signature[0], meta->signature[1]); in g_raid_md_jmicron_print()
149 printf("version %04x\n", meta->version); in g_raid_md_jmicron_print()
150 printf("checksum 0x%04x\n", meta->checksum); in g_raid_md_jmicron_print()
151 printf("disk_id 0x%08x\n", meta->disk_id); in g_raid_md_jmicron_print()
152 printf("offset 0x%08x\n", meta->offset); in g_raid_md_jmicron_print()
153 printf("disk_sectors_high 0x%08x\n", meta->disk_sectors_high); in g_raid_md_jmicron_print()
154 printf("disk_sectors_low 0x%04x\n", meta->disk_sectors_low); in g_raid_md_jmicron_print()
[all …]
H A Dmd_intel.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
199 sizeof(struct intel_raid_disk) * (ndisks - 1) + \
202 sizeof(uint32_t) * (ndisks - 1) * 4)
266 if (i > (mvol->migr_state ? 1 : 0)) in intel_get_map()
268 mmap = &mvol->map[0]; in intel_get_map()
269 for (; i > 0; i--) { in intel_get_map()
271 &mmap->disk_idx[mmap->total_disks]; in intel_get_map()
284 mvol = (struct intel_raid_vol *)&meta->disk[meta->total_disks]; in intel_get_volume()
[all …]
H A Dmd_ddf.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
134 #define GET8(m, f) ((m)->f)
135 #define GET16(m, f) ((m)->bigendian ? be16dec(&(m)->f) : le16dec(&(m)->f))
136 #define GET32(m, f) ((m)->bigendian ? be32dec(&(m)->f) : le32dec(&(m)->f))
137 #define GET64(m, f) ((m)->bigendian ? be64dec(&(m)->f) : le64dec(&(m)->f))
139 #define GET16D(m, f) ((m)->bigendian ? be16dec(&f) : le16dec(&f))
140 #define GET32D(m, f) ((m)->bigendian ? be32dec(&f) : le32dec(&f))
141 #define GET64D(m, f) ((m)->bigendian ? be64dec(&f) : le64dec(&f))
143 #define GET16P(m, f) ((m)->bigendian ? be16dec(f) : le16dec(f))
[all …]
/freebsd/sys/dev/igc/
H A Digc_phy.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
62 #define IGC_I225_PHPM_ULP 0x0400 /* Ultra Low-Power Mode */
65 /* GPY211 - I225 defines */
73 #define IGP01IGC_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */
112 #define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control */
127 #define IFE_PMC_MDIX_STATUS 0x0020 /* 1=MDI-X, 0=MDI */
128 #define IFE_PMC_FORCE_MDIX 0x0040 /* 1=force MDI-X, 0=force MDI */
H A Digc_phy.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_phy_ops_generic - Initialize PHY function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic()
24 phy->ops.init_params = igc_null_ops_generic; in igc_init_phy_ops_generic()
25 phy->ops.acquire = igc_null_ops_generic; in igc_init_phy_ops_generic()
26 phy->ops.check_reset_block = igc_null_ops_generic; in igc_init_phy_ops_generic()
27 phy->ops.force_speed_duplex = igc_null_ops_generic; in igc_init_phy_ops_generic()
28 phy->ops.get_info = igc_null_ops_generic; in igc_init_phy_ops_generic()
[all …]
H A Digc_defines.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
72 #define IGC_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
89 #define IGC_RXD_STAT_PIF 0x80 /* passed in-exact filter */
128 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
129 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
215 #define IGC_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
217 #define IGC_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
279 /* 1000/H is not supported, nor spec-compliant. */
329 #define IGC_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
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/freebsd/sbin/ipf/ipftest/
H A Dmd5.c6 ** md5.c -- the source code for MD5 routines **
7 ** RSA Data Security, Inc. MD5 Message-Digest Algorithm **
18 ** it is identified as the "RSA Data Security, Inc. MD5 Message- **
24 ** Data Security, Inc. MD5 Message-Digest Algorithm" in all **
47 ** Message-digest routines: **
52 ** The message digest is now in mdContext->digest[0...15] **
71 #define F(x, y, z) (((x) & (y)) | ((~x) & (z))) argument
72 #define G(x, y, z) (((x) & (z)) | ((y) & (~z))) argument
73 #define H(x, y, z) ((x) ^ (y) ^ (z)) argument
74 #define I(x, y, z) ((y) ^ ((x) | (~z))) argument
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/freebsd/sys/contrib/device-tree/Bindings/net/pse-pd/
H A Dpse-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pse-pd/pse-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 power over twisted pair/ethernet cable. The ethernet-pse nodes should be
12 used to describe PSE controller and referenced by the ethernet-phy node.
15 - Oleksij Rempel <o.rempel@pengutronix.de>
16 - Kory Maincent <kory.maincent@bootlin.com>
20 pattern: "^ethernet-pse(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#pse-cells":
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/freebsd/sys/dev/e1000/
H A De1000_phy.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
143 /* GS40G - I210 PHY defines */
168 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
173 (((offset) >> (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)) &\
240 #define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */
244 /* Enable flexible speed on link-up */
294 #define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control */
309 #define IFE_PMC_MDIX_STATUS 0x0020 /* 1=MDI-X, 0=MDI */
310 #define IFE_PMC_FORCE_MDIX 0x0040 /* 1=force MDI-X, 0=force MDI */
[all …]
H A De1000_phy.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
65 * e1000_init_phy_ops_generic - Initialize PHY function pointers
68 * Setups up the function pointers to no-op functions
72 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_ops_generic()
76 phy->ops.init_params = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
77 phy->ops.acquire = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
78 phy->ops.check_polarity = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
79 phy->ops.check_reset_block = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
80 phy->ops.commit = e1000_null_ops_generic; in e1000_init_phy_ops_generic()
[all …]
H A De1000_80003es2lan.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
84 * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
89 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_80003es2lan()
94 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_80003es2lan()
95 phy->type = e1000_phy_none; in e1000_init_phy_params_80003es2lan()
98 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_80003es2lan()
99 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan; in e1000_init_phy_params_80003es2lan()
102 phy->addr = 1; in e1000_init_phy_params_80003es2lan()
103 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_80003es2lan()
[all …]
H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
173 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
174 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
262 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
264 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
341 #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
342 #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
[all …]
H A De1000_mac.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * e1000_init_mac_ops_generic - Initialize MAC function pointers
45 * Setups up the function pointers to no-op functions
49 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
53 mac->ops.init_params = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
54 mac->ops.init_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
55 mac->ops.reset_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
56 mac->ops.setup_physical_interface = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
57 mac->ops.get_bus_info = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
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/freebsd/sys/netgraph/
H A Dng_macfilter.c2 * SPDX-License-Identifier: BSD-2-Clause
81 #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
114 (const struct ngm_macfilter_macs *)(buf - OFFSETOF(struct ngm_macfilter_macs, macs)); in macfilter_get_macs_count()
116 return ngm_macs->n; in macfilter_get_macs_count()
147 (const struct ngm_macfilter_hooks *)(buf - OFFSETOF(struct ngm_macfilter_hooks, hooks)); in macfilter_get_upper_hook_count()
149 MACFILTER_DEBUG("buf %p, ngm_hooks %p, n %d", buf, ngm_hooks, ngm_hooks->n); in macfilter_get_upper_hook_count()
151 return ngm_hooks->n; in macfilter_get_upper_hook_count()
277 * Resize the MAC table to accommodate at least mfp->mf_mac_used + 1 entries.
286 int n = mfp->mf_mac_allocated; in macfilter_mactable_resize()
287 if (mfp->mf_mac_used < 2*MACTABLE_BLOCKSIZE-1) /* minimum size */ in macfilter_mactable_resize()
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/freebsd/sys/dev/mii/
H A Drgephyreg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
140 #define RGEPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
141 #define RGEPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
142 #define RGEPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
143 #define RGEPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
166 #define RGEPHY_SSR_MDI_XOVER 0x0040 /* MDI crossover */
172 #define RGEPHY_F_PCR1_MDI_MM 0x0200 /* MDI / MDIX Manual Mode */
173 #define RGEPHY_F_PCR1_MDI_MODE 0x0100 /* MDI Mode (0=MDIX,1=MDI) */
[all …]
H A Dmii_bitbang.c3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
36 * Common module for bit-bang'ing the MII.
51 #define MWRITE(x) \ argument
53 ops->mbo_write(dev, (x)); \
57 #define MREAD ops->mbo_read(dev)
59 #define MDO ops->mbo_bits[MII_BIT_MDO]
60 #define MDI ops->mbo_bits[MII_BIT_MDI] macro
61 #define MDC ops->mbo_bits[MII_BIT_MDC]
62 #define MDIRPHY ops->mbo_bits[MII_BIT_DIR_HOST_PHY]
[all …]
H A Dciphyreg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
159 #define CIPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
160 #define CIPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
161 #define CIPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
162 #define CIPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
171 /* Vendor-specific PHY registers */
195 #define CIPHY_1000STS2_BCM5400 0x0040 /* non-complient BCM5400 detected */
292 #define CIPHY_IMR_XOVER 0x0040 /* MDI crossover change event */
[all …]
H A Dbrgphyreg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
113 #define BRGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
114 #define BRGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
115 #define BRGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
116 #define BRGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
119 #define BRGPHY_PHY_EXTCTL_MAC_PHY 0x8000 /* 10BIT/GMI-interface */
120 #define BRGPHY_PHY_EXTCTL_DIS_CROSS 0x4000 /* Disable MDI crossover */
124 #define BRGPHY_PHY_EXTCTL_BY_45 0x0400 /* Bypass 4B5B-Decoder */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dqcom,qca807x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Robert Marko <robert.marko@sartura.hr>
15 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
16 1000BASE-T PHY-s.
21 Both models have a combo port that supports 1000BASE-X and
22 100BASE-FX fiber.
25 output only pins that natively drive LED-s for up to 2 attached
[all …]
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_vsc8211.c2 SPDX-License-Identifier: BSD-2-Clause
57 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
81 #define V_ACSR_ACTIPHY_TMR(x) ((x) << S_ACSR_ACTIPHY_TMR) argument
85 #define G_ACSR_SPEED(x) (((x) >> S_ACSR_SPEED) & M_ACSR_SPEED) argument
135 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
145 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
208 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status_fiber()
218 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status_fiber()
272 * Enable/disable auto MDI/MDI-X in forced link speed mode.
384 #define V_VSC8211_TXFIFODEPTH(x) ((x) << S_VSC8211_TXFIFODEPTH) argument
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H A Dcxgb_mv88e1xxx.c2 SPDX-License-Identifier: BSD-2-Clause
70 #define V_PSCR_MDI_XOVER_MODE(x) ((x) << S_PSCR_MDI_XOVER_MODE) argument
78 #define V_DOWNSHIFT_CNT(x) ((x) << S_DOWNSHIFT_CNT) argument
104 #define V_PSSR_CABLE_LEN(x) ((x) << S_PSSR_CABLE_LEN) argument
105 #define G_PSSR_CABLE_LEN(x) (((x) >> S_PSSR_CABLE_LEN) & M_PSSR_CABLE_LEN) argument
121 #define V_PSSR_SPEED(x) ((x) << S_PSSR_SPEED) argument
122 #define G_PSSR_SPEED(x) (((x) >> S_PSSR_SPEED) & M_PSSR_SPEED) argument
124 /* MV88E1XXX MDI crossover register values */
191 int sp = -1, dplx = -1, pause = 0; in mv88e1xxx_get_link_status()
300 struct cphy *phy = &pinfo->phy; in t3_mv88e1xxx_phy_prep()
[all …]
/freebsd/contrib/tcpdump/
H A Dprint-lldp.c2 * Copyright (c) 1998-2007 The TCPDUMP project
24 #include "netdissect-stdinc.h"
34 #define LLDP_EXTRACT_TYPE(x) (((x)&0xfe00)>>9) argument
35 #define LLDP_EXTRACT_LEN(x) ((x)&0x01ff) argument
178 { LLDP_PRIVATE_8023_SUBTYPE_MDIPOWER, "Power via MDI"},
197 { LLDP_PRIVATE_TIA_SUBTYPE_CAPABILITIES, "LLDP-MED Capabilities" },
200 { LLDP_PRIVATE_TIA_SUBTYPE_EXTENDED_POWER_MDI, "Extended power-via-MDI" },
201 { LLDP_PRIVATE_TIA_SUBTYPE_INVENTORY_HARDWARE_REV, "Inventory - hardware revision" },
202 { LLDP_PRIVATE_TIA_SUBTYPE_INVENTORY_FIRMWARE_REV, "Inventory - firmware revision" },
203 { LLDP_PRIVATE_TIA_SUBTYPE_INVENTORY_SOFTWARE_REV, "Inventory - software revision" },
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_phy.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
54 * ixgbe_out_i2c_byte_ack - Send I2C byte with ack
71 * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack
85 * ixgbe_ones_comp_byte_add - Perform one's complement addition
89 * Returns one's complement 8-bit sum.
100 * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation
112 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
125 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
140 /* Re-start condition */ in ixgbe_read_i2c_combined_generic_int()
[all …]

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