Home
last modified time | relevance | path

Searched full:k210 (Results 1 – 25 of 36) sorted by relevance

12

/linux/Documentation/devicetree/bindings/reset/
H A Dcanaan,k210-rst.yaml4 $id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml#
7 title: Canaan Kendryte K210 Reset Controller
13 Canaan Kendryte K210 reset controller driver which supports the SoC
15 of the SoC. The K210 reset controller node must be defined as a child
16 node of the K210 system controller node.
19 - dt-bindings/reset/k210-rst.h
23 const: canaan,k210-rst
36 #include <dt-bindings/reset/k210-rst.h>
38 compatible = "canaan,k210-rst";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcanaan,k210-fpioa.yaml4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#
7 title: Canaan Kendryte K210 FPIOA
13 The Canaan Kendryte K210 SoC Fully Programmable IO Array (FPIOA)
20 const: canaan,k210-fpioa
40 canaan,k210-sysctl-power:
44 - description: phandle of the K210 system controller node
47 phandle of the K210 system controller node and offset of its
65 macros in include/dt-bindings/pinctrl/k210-fpioa.h.
153 - canaan,k210-sysctl-power
159 #include <dt-bindings/pinctrl/k210-fpioa.h>
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dcanaan,k210-clk.yaml4 $id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml#
7 title: Canaan Kendryte K210 Clock
13 Canaan Kendryte K210 SoC clocks driver bindings. The clock
14 controller node must be defined as a child node of the K210
18 - dt-bindings/clock/k210-clk.h
22 const: canaan,k210-clk
41 #include <dt-bindings/clock/k210-clk.h>
53 compatible = "canaan,k210-clk";
/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
17 compatible = "canaan,kendryte-k210";
20 * The K210 has an sv39 MMU following the privileged specification v1.9.
22 * support it and the K210 support enabled only for the !MMU case.
31 compatible = "canaan,k210", "riscv";
47 compatible = "canaan,k210", "riscv";
83 compatible = "canaan,k210-sram";
[all …]
H A Dk210_generic.dts9 #include "k210.dtsi"
15 model = "Kendryte K210 generic";
16 compatible = "canaan,kendryte-k210";
H A Dcanaan_kd233.dts9 #include "k210.dtsi"
16 compatible = "canaan,kendryte-kd233", "canaan,kendryte-k210";
H A Dsipeed_maix_bit.dts9 #include "k210.dtsi"
18 "canaan,kendryte-k210";
H A Dsipeed_maix_dock.dts9 #include "k210.dtsi"
18 "canaan,kendryte-k210";
H A Dsipeed_maixduino.dts9 #include "k210.dtsi"
16 compatible = "sipeed,maixduino", "canaan,kendryte-k210";
H A Dsipeed_maix_go.dts9 #include "k210.dtsi"
17 compatible = "sipeed,maix-go", "canaan,kendryte-k210";
/linux/Documentation/devicetree/bindings/riscv/
H A Dcanaan.yaml13 Canaan Kendryte K210 SoC-based boards
23 - const: canaan,kendryte-k210
27 - const: canaan,kendryte-k210
32 - const: canaan,kendryte-k210
36 - const: canaan,kendryte-k210
40 - const: canaan,kendryte-k210
43 - const: canaan,kendryte-k210
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dcanaan,k210-sram.yaml4 $id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
7 title: Canaan K210 SRAM memory controller
10 The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
20 - canaan,k210-sram
45 #include <dt-bindings/clock/k210-clk.h>
47 compatible = "canaan,k210-sram";
/linux/drivers/soc/canaan/
H A Dk210-sysctl.c12 #include <soc/canaan/k210-sysctl.h>
20 dev_info(dev, "K210 system controller\n"); in k210_sysctl_probe()
43 { .compatible = "canaan,k210-sysctl", },
49 .name = "k210-sysctl",
72 panic("k210-sysctl: ioremap failed"); in k210_soc_early_init()
78 SOC_EARLY_INIT_DECLARE(k210_soc, "canaan,kendryte-k210", k210_soc_early_init);
H A DKconfig4 bool "Canaan Kendryte K210 SoC system controller"
11 Canaan Kendryte K210 SoC system controller driver.
H A DMakefile3 obj-$(CONFIG_SOC_K210_SYSCTL) += k210-sysctl.o
/linux/drivers/reset/
H A Dreset-k210.c11 #include <soc/canaan/k210-sysctl.h>
13 #include <dt-bindings/reset/k210-rst.h>
96 dev_info(dev, "K210 reset controller\n"); in k210_rst_probe()
120 { .compatible = "canaan,k210-rst" },
127 .name = "k210-rst",
H A DKconfig127 bool "Reset controller driver for Canaan Kendryte K210 SoC"
132 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
/linux/arch/riscv/
H A DKconfig.socs80 bool "Canaan Kendryte K210 SoC"
87 This enables support for Canaan Kendryte K210 SoC platform hardware.
/linux/drivers/pinctrl/
H A Dpinctrl-k210.c21 #include <dt-bindings/pinctrl/k210-fpioa.h>
28 * The K210 only implements 8 drive levels, even though
54 /* Strong pull up not implemented on K210 */
80 * struct k210_fpioa: Kendryte K210 FPIOA memory mapped registers
883 .name = "k210-pinctrl",
928 dev_info(dev, "K210 FPIOA pin controller\n"); in k210_fpioa_probe()
951 "canaan,k210-sysctl-power", in k210_fpioa_probe()
966 { .compatible = "canaan,k210-fpioa" },
973 .name = "k210-fpioa",
/linux/Documentation/devicetree/bindings/gpio/
H A Dsifive,gpio.yaml18 - canaan,k210-gpiohs
44 It is 16 for the SiFive SoCs and 32 for the Canaan K210.
/linux/Documentation/devicetree/bindings/sound/
H A Dsnps,designware-i2s.yaml16 - const: canaan,k210-i2s
95 const: canaan,k210-i2s
/linux/Documentation/devicetree/bindings/spi/
H A Dsnps,dw-apb-ssi.yaml83 - description: Canaan Kendryte K210 SoS SPI Controller
84 const: canaan,k210-spi
/linux/include/dt-bindings/reset/
H A Dk210-rst.h10 * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits.
/linux/include/dt-bindings/clock/
H A Dk210-clk.h10 * Kendryte K210 SoC clock identifiers (arbitrary values).
/linux/Documentation/devicetree/bindings/serial/
H A Dsifive-serial.yaml23 - canaan,k210-uarths

12