| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | google,gs101-clock.yaml | 4 $id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml# 7 title: Google GS101 SoC clock controller 13 Google GS101 clock controller is comprised of several CMU units, generating 25 'dt-bindings/clock/gs101.h' header. 30 - google,gs101-cmu-top 31 - google,gs101-cmu-apm 32 - google,gs101-cmu-misc 33 - google,gs101-cmu-hsi0 34 - google,gs101-cmu-hsi2 35 - google,gs101-cmu-peric0 [all …]
|
| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | google.yaml | 16 Currently upstream this is devices using "gs101" SoC which is found in Pixel 22 - SoC ID ("gs101") 30 e.g. gs101 and gs101-oriole. 40 - google,gs101-oriole 41 - google,gs101-raven 42 - const: google,gs101
|
| /linux/Documentation/devicetree/bindings/soc/samsung/ |
| H A D | samsung,exynos-sysreg.yaml | 17 - google,gs101-apm-sysreg 18 - google,gs101-hsi2-sysreg 19 - google,gs101-peric0-sysreg 20 - google,gs101-peric1-sysreg 86 - google,gs101-hsi2-sysreg 87 - google,gs101-peric0-sysreg 88 - google,gs101-peric1-sysreg
|
| H A D | exynos-pmu.yaml | 18 - google,gs101-pmu 39 - google,gs101-pmu 202 - google,gs101-pmu
|
| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | samsung-wdt.yaml | 21 - google,gs101-wdt # for Google gs101 54 Exynos990 or Google gs101). 60 Exynos5420, Exynos7, Exynos850, Exynos990 and gs101). 76 - google,gs101-wdt 92 - google,gs101-wdt
|
| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | samsung_uart.yaml | 24 - google,gs101-uart 34 - const: google,gs101-uart 171 - google,gs101-uart 188 - google,gs101-uart 211 #include <dt-bindings/clock/google,gs101.h> 216 compatible = "google,gs101-uart";
|
| /linux/arch/arm64/boot/dts/exynos/google/ |
| H A D | gs101-raven.dts | 11 #include "gs101-pixel-common.dtsi" 15 compatible = "google,gs101-raven", "google,gs101";
|
| H A D | gs101-oriole.dts | 11 #include "gs101-pixel-common.dtsi" 15 compatible = "google,gs101-oriole", "google,gs101";
|
| H A D | Makefile | 4 gs101-oriole.dtb \ 5 gs101-raven.dtb
|
| H A D | gs101-pinctrl.h | 3 * Pinctrl binding constants for GS101 21 /* GS101 drive strengths */
|
| H A D | gs101-pixel-common.dtsi | 3 * Device Tree nodes common for all GS101-based Pixel 14 #include "gs101-pinctrl.h" 15 #include "gs101.dtsi"
|
| H A D | gs101-pinctrl.dtsi | 3 * GS101 SoC pin-mux and pin-config device tree source 9 #include "gs101-pinctrl.h"
|
| /linux/Documentation/devicetree/bindings/soc/google/ |
| H A D | google,gs101-pmu-intr-gen.yaml | 4 $id: http://devicetree.org/schemas/soc/google/google,gs101-pmu-intr-gen.yaml# 18 - const: google,gs101-pmu-intr-gen 33 compatible = "google,gs101-pmu-intr-gen", "syscon";
|
| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | google,gs101-acpm-ipc.yaml | 5 $id: http://devicetree.org/schemas/firmware/google,gs101-acpm-ipc.yaml# 25 const: google,gs101-acpm-ipc 58 compatible = "google,gs101-acpm-ipc";
|
| /linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | syscon-reboot.yaml | 26 - google,gs101-reboot 65 const: google,gs101-reboot 97 compatible = "google,gs101-reboot";
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | samsung,exynos-dwc3.yaml | 16 - google,gs101-dwusb3 69 const: google,gs101-dwusb3
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | samsung,usb3-drd-phy.yaml | 28 - google,gs101-usb31drd-phy 126 const: google,gs101-usb31drd-phy
|
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | samsung,exynos4210-mct.yaml | 30 - google,gs101-mct 136 - google,gs101-mct
|
| /linux/drivers/clk/samsung/ |
| H A D | Makefile | 30 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-gs101.o
|
| /linux/drivers/power/reset/ |
| H A D | syscon-reboot.c | 148 { .compatible = "google,gs101-reboot", .data = &gs101_reboot_data },
|
| /linux/drivers/tty/serial/ |
| H A D | samsung_tty.c | 2511 .name = "Google GS101 UART", 2634 .name = "gs101-uart", 2660 { .compatible = "google,gs101-uart", 2837 /* gs101 always expects MMIO32 register accesses. */ in gs101_early_console_setup() 2843 OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
|
| /linux/drivers/usb/dwc3/ |
| H A D | dwc3-exynos.c | 219 .compatible = "google,gs101-dwusb3",
|
| /linux/include/dt-bindings/clock/ |
| H A D | google,gs101.h | 6 * Device Tree binding constants for Google gs101 clock controller.
|
| /linux/include/linux/soc/samsung/ |
| H A D | exynos-regs-pmu.h | 673 /* For Tensor GS101 */
|
| /linux/drivers/phy/samsung/ |
| H A D | phy-exynos5-usbdrd.c | 209 * while on versions with (like gs101), bits 2 and 3 are for the 3.0 phy (SS) 253 /* Exynos9 - GS101 */ 2237 .compatible = "google,gs101-usb31drd-phy",
|