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/linux/Documentation/devicetree/bindings/gpio/
H A Dsprd,gpio-eic.yaml5 $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
8 title: Unisoc EIC controller
16 The EIC is the abbreviation of external interrupt controller, which can
17 be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
18 one is in digital chip, and another one is in PMIC. The digital chip EIC
19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
23 The EIC-debounce sub-module provides up to 8 source input signal
32 The EIC-latch sub-module is used to latch some special power down signals
33 and generate interrupts, since the EIC-latch does not depend on the APB
[all …]
/linux/drivers/irqchip/
H A Dirq-mchp-eic.c28 * struct mchp_eic - EIC private data structure
32 * @irqs: irqs b/w eic and gic
45 static struct mchp_eic *eic; variable
51 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_mask()
53 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_mask()
62 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_unmask()
64 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_unmask()
74 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_set_type()
96 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_set_type()
103 irq_set_irq_wake(eic->irqs[d->hwirq], on); in mchp_eic_irq_set_wake()
[all …]
H A Dirq-mips-gic.c163 /* All local interrupts are routable in EIC mode. */ in gic_local_irq_is_routable()
887 /* Enable or disable EIC */ in gic_cpu_startup()
960 /* Always use vector 1 in EIC mode */ in gic_of_init()
/linux/drivers/gpio/
H A Dgpio-eic-sprd.c17 /* EIC registers definition */
54 * The digital-chip EIC controller can support maximum 3 banks, and each bank
64 * The Spreadtrum EIC (external interrupt controller) can be used only in
67 * The Spreadtrum digital-chip EIC controller contains 4 sub-modules:
68 * debounce EIC, latch EIC, async EIC and sync EIC,
70 * The debounce EIC is used to capture the input signals' stable status
75 * The latch EIC is used to latch some special power down signals and
76 * generate interrupts, since the latch EIC does not depend on the APB clock
79 * The async EIC uses a 32k clock to capture the short signals (microsecond
82 * The EIC-sync is similar with GPIO's input function, which is a synchronized
[all …]
H A Dgpio-pmic-eic-sprd.c15 /* EIC registers definition */
27 * The PMIC EIC controller only has one bank, and each bank now can contain
48 * struct sprd_pmic_eic - PMIC EIC controller
51 * @offset: the EIC controller's offset address of the PMIC.
52 * @reg: the array to cache the EIC registers.
54 * @irq: the interrupt number of the PMIC EIC conteroller.
184 * Will set the trigger level according to current EIC level in sprd_pmic_eic_irq_set_type()
226 /* Generate trigger start pulse for debounce EIC */ in sprd_pmic_eic_bus_sync_unlock()
251 dev_warn(chip->parent, "PMIC EIC level was changed.\n"); in sprd_pmic_eic_toggle_trigger()
258 /* Generate trigger start pulse for debounce EIC */ in sprd_pmic_eic_toggle_trigger()
[all …]
H A DKconfig281 tristate "Spreadtrum EIC support"
286 Say yes here to support Spreadtrum EIC device.
1561 tristate "Spreadtrum PMIC EIC support"
1566 Say yes here to support Spreadtrum PMIC EIC device.
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmicrochip,sama7g5-eic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/microchip,sama7g5-eic.yaml#
19 - microchip,sama7g5-eic
61 eic: interrupt-controller@e1628000 {
62 compatible = "microchip,sama7g5-eic";
H A Dmti,gic.yaml43 route interrupts. This property is ignored if the CPU is started in EIC
/linux/arch/mips/include/asm/mips-boards/
H A Dmaltaint.h42 * Interrupts 96..127 are used for Soc-it EIC interrupts
46 /* SOC-it EIC interrupt offsets */
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi205 compatible = "sprd,sc9860-eic-debounce";
215 compatible = "sprd,sc9860-eic-latch";
225 compatible = "sprd,sc9860-eic-async";
235 compatible = "sprd,sc9860-eic-sync";
/linux/arch/s390/kvm/
H A Dintercept.c304 u16 eic = vcpu->arch.sie_block->eic; in handle_external_interrupt() local
323 if ((eic == EXT_IRQ_CLK_COMP || eic == EXT_IRQ_CPU_TIMER) && in handle_external_interrupt()
327 switch (eic) { in handle_external_interrupt()
H A Dinterrupt.c489 vcpu->arch.sie_block->eic = EXT_IRQ_CPU_TIMER; in __deliver_cpu_timer()
513 vcpu->arch.sie_block->eic = EXT_IRQ_CLK_COMP; in __deliver_ckc()
779 vcpu->arch.sie_block->eic = EXT_IRQ_EMERGENCY_SIG; in __deliver_emergency_signal()
813 vcpu->arch.sie_block->eic = EXT_IRQ_EXTERNAL_CALL; in __deliver_external_call()
970 vcpu->arch.sie_block->eic = EXT_IRQ_SERVICE_SIG; in write_sclp()
/linux/drivers/net/ethernet/renesas/
H A Dravb.h149 EIC = 0x0358, enumerator
412 /* EIC */
/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5.dtsi663 eic: interrupt-controller@e1628000 { label
664 compatible = "microchip,sama7g5-eic";
/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c1152 static SPRD_SC_GATE_CLK_HW(eic_eb, "eic-eb", &aon_apb.common.hw, 0x0,
1242 static SPRD_SC_GATE_CLK_HW(eic_rtc_eb, "eic-rtc-eb", &aon_apb.common.hw,
1244 static SPRD_SC_GATE_CLK_HW(eic_rtcdv5_eb, "eic-rtcdv5-eb", &aon_apb.common.hw,
H A Dsc9860-clk.c854 static SPRD_SC_GATE_CLK(eic_eb, "eic-eb", "aon-apb", 0x0,
974 static SPRD_SC_GATE_CLK(eic_rtc_eb, "eic-rtc-eb", "aon-apb", 0x10,
976 static SPRD_SC_GATE_CLK(eic_rtcdv5_eb, "eic-rtcdv5-eb", "aon-apb", 0x10,
/linux/
H A DMAINTAINERS16800 MICROCHIP EIC DRIVER
16804 F: Documentation/devicetree/bindings/interrupt-controller/microchip,sama7g5-eic.yaml
16805 F: drivers/irqchip/irq-mchp-eic.c