DRAM (full) in projects: linux - OpenGrok search results

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/linux/drivers/net/wireless/intel/iwlwifi/pcie/
H A D	ctxt-info.c	50 struct iwl_dram_data dram) in iwl_pcie_ctxt_info_alloc_dma() argument 52 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_ctxt_info_alloc_dma() 53 &dram->physical); in iwl_pcie_ctxt_info_alloc_dma() 54 if (!dram->block) in iwl_pcie_ctxt_info_alloc_dma() 57 dram->size = len; in iwl_pcie_ctxt_info_alloc_dma() 58 memcpy(dram->block, data, len); in iwl_pcie_ctxt_info_alloc_dma() 65 struct iwl_self_init_dram dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_paging() local 68 if (!dram->paging) { in iwl_pcie_ctxt_info_free_paging() 69 WARN_ON(dram->paging_cnt); in iwl_pcie_ctxt_info_free_paging() 74 for (i = 0; i < dram->paging_cnt; i++) in iwl_pcie_ctxt_info_free_paging() [all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	memory.json	125 …on": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram.", 128 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM", 135 …on": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram.", 138 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM", 145 …Description": "Counts all prefetch code reads that miss the LLC and the data returned from dram.", 148 "EventName": "OFFCORE_RESPONSE.ALL_PF_CODE_RD.LLC_MISS.DRAM", 155 …Description": "Counts all prefetch data reads that miss the LLC and the data returned from dram.", 158 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.LLC_MISS.DRAM", 165 …"BriefDescription": "Counts all prefetch RFOs that miss the LLC and the data returned from dram.", 168 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.LLC_MISS.DRAM", [all …]
/linux/drivers/ras/amd/atl/
H A D	reg_fields.h	`71 * D18F0x114 [DRAM Limit Address] 76 * D18F7xE08 [DRAM Address Control] 79 * D18F7x208 [DRAM Address Control] 132 * DRAM Address Range Valid 139 * D18F0x110 [DRAM Base Address] 144 * D18F7xE08 [DRAM Address Control] 147 * D18F7x208 [DRAM Address Control] 153 * DRAM Base Address 160 * D18F0x110 [DRAM Base Address] 165 * D18F7xE00 [DRAM Base Address] [all …]`
/linux/tools/perf/pmu-events/arch/x86/westmereex/
H A D	memory.json	11 "BriefDescription": "Offcore data reads satisfied by any DRAM", 31 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 41 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 51 "BriefDescription": "Offcore code reads satisfied by any DRAM", 71 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 81 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 91 "BriefDescription": "Offcore requests satisfied by any DRAM", 111 "BriefDescription": "Offcore requests satisfied by the local DRAM", 121 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 131 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemex/
H A D	memory.json	3 "BriefDescription": "Offcore data reads satisfied by any DRAM", 23 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 33 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 43 "BriefDescription": "Offcore code reads satisfied by any DRAM", 63 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 73 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 83 "BriefDescription": "Offcore requests satisfied by any DRAM", 103 "BriefDescription": "Offcore requests satisfied by the local DRAM", 113 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 123 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/nehalemep/
H A D	memory.json	3 "BriefDescription": "Offcore data reads satisfied by any DRAM", 23 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 33 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 43 "BriefDescription": "Offcore code reads satisfied by any DRAM", 63 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 73 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 83 "BriefDescription": "Offcore requests satisfied by any DRAM", 103 "BriefDescription": "Offcore requests satisfied by the local DRAM", 113 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 123 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/westmereep-sp/
H A D	memory.json	3 "BriefDescription": "Offcore data reads satisfied by any DRAM", 23 "BriefDescription": "Offcore data reads satisfied by the local DRAM", 33 "BriefDescription": "Offcore data reads satisfied by a remote DRAM", 43 "BriefDescription": "Offcore code reads satisfied by any DRAM", 63 "BriefDescription": "Offcore code reads satisfied by the local DRAM", 73 "BriefDescription": "Offcore code reads satisfied by a remote DRAM", 83 "BriefDescription": "Offcore requests satisfied by any DRAM", 103 "BriefDescription": "Offcore requests satisfied by the local DRAM", 113 "BriefDescription": "Offcore requests satisfied by a remote DRAM", 123 "BriefDescription": "Offcore RFO requests satisfied by any DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A D	data-fabric.json	36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/linux/tools/perf/pmu-events/arch/x86/amdzen2/
H A D	data-fabric.json	36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/linux/tools/perf/pmu-events/arch/x86/amdzen3/
H A D	data-fabric.json	36 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 44 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 52 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 60 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 68 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 76 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 84 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe… 92 …"PublicDescription": "DRAM Channel Controller Request Types: Requests with Data (64B): DRAM Channe…
/linux/Documentation/devicetree/bindings/memory-controllers/
H A D	rockchip,rk3399-dmc.yaml	71 SR_IDLE * 1024 DFI clock cycles (DFI clocks freq is half of DRAM clock). 100 self-refresh mode. The controller, pi, PHY and DRAM clock will be gated 130 When the DRAM type is DDR3, this parameter defines the ODT disable 132 the ODT on the DRAM side and controller side are both disabled. 138 When the DRAM type is DDR3, this parameter defines the DRAM side drive 146 When the DRAM type is DDR3, this parameter defines the DRAM side ODT 154 When the DRAM type is DDR3, this parameter defines the phy side CA line 162 When the DRAM type is DDR3, this parameter defines the PHY side DQ line 170 When the DRAM type is DDR3, this parameter defines the PHY side ODT 178 When the DRAM type is LPDDR3, this parameter defines then ODT disable [all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	uncore-memory.json	8 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… 19 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p… 25 "BriefDescription": "DRAM Activate Count : All Activates", 30 …DRAM Activate Count : All Activates : Counts the number of DRAM Activate commands sent on this cha… 35 "BriefDescription": "DRAM Activate Count : Activate due to Bypass", 41 …DRAM Activate Count : Activate due to Bypass : Counts the number of DRAM Activate commands sent on… 46 "BriefDescription": "All DRAM CAS commands issued", 51 "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.", 56 "BriefDescription": "All DRAM read CAS commands issued (including underfills)", 61 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… [all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	uncore-memory.json	3 …issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data… 12 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 21 …issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data… 30 …issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data… 39 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 48 …issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data…
/linux/tools/perf/pmu-events/arch/arm64/thead/yitian710/sys/
H A D	ali_drw.json	38 "BriefDescription": "A write data cycle at DFI interface (to DRAM).", 45 "BriefDescription": "A read data cycle at DFI interface (to DRAM).", 73 "BriefDescription": "An Activate(ACT) command to DRAM.", 80 "BriefDescription": "A Read or Write CAS command to DRAM.", 87 "BriefDescription": "An Activate(ACT) command for read to DRAM.", 94 "BriefDescription": "A Read CAS command to DRAM.", 101 "BriefDescription": "A Write CAS command to DRAM.", 108 "BriefDescription": "A Masked Write command to DRAM.", 115 "BriefDescription": "A Precharge(PRE) command to DRAM.", 255 "BriefDescription": "An auto-refresh(REF) command to DRAM.", [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlaken/
H A D	uncore-memory.json	3 …ion": "Counts every 64B read request entering the Memory Controller 0 to DRAM (sum of all channel… 8 …tion": "Counts every 64B read request entering the Memory Controller 0 to DRAM (sum of all channel… 13 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 22 …"BriefDescription": "Counts every 64B read request entering the Memory Controller 1 to DRAM (sum o… 27 …"PublicDescription": "Counts every 64B read entering the Memory Controller 1 to DRAM (sum of all c… 32 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 41 "BriefDescription": "ACT command for a read request sent to DRAM", 49 "BriefDescription": "ACT command sent to DRAM", 57 "BriefDescription": "ACT command for a write request sent to DRAM", 65 "BriefDescription": "Read CAS command sent to DRAM", [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	uncore-memory.json	3 …ion": "Counts every 64B read request entering the Memory Controller 0 to DRAM (sum of all channel… 8 …tion": "Counts every 64B read request entering the Memory Controller 0 to DRAM (sum of all channel… 13 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 22 …"BriefDescription": "Counts every 64B read request entering the Memory Controller 1 to DRAM (sum o… 27 …"PublicDescription": "Counts every 64B read entering the Memory Controller 1 to DRAM (sum of all c… 32 …DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. … 41 "BriefDescription": "ACT command for a read request sent to DRAM", 49 "BriefDescription": "ACT command sent to DRAM", 57 "BriefDescription": "ACT command for a write request sent to DRAM", 65 "BriefDescription": "Read CAS command sent to DRAM", [all …]
/linux/drivers/edac/
H A D	i3000_edac.c	25 /* Intel 3000 register addresses - device 0 function 0 - DRAM Controller / 31 #define I3000_EDEAP 0x70 / Extended DRAM Error Address Pointer (8b) 36 #define I3000_DEAP 0x58 /* DRAM Error Address Pointer (32b) 68 #define I3000_DERRSYN 0x5c /* DRAM Error Syndrome (8b) 70 * 7:0 DRAM ECC Syndrome 79 * 9 LOCK to non-DRAM Memory Flag (LCKF) 82 * 1 Multi-bit DRAM ECC Error Flag (DMERR) 83 * 0 Single-bit DRAM ECC Error Flag (DSERR) 95 * 9 SERR on LOCK to non-DRAM Memory 97 * 8 SERR on DRAM Refresh Timeout [all …]
H A D	i82975x_edac.c	`34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller / 35 #define I82975X_EAP 0x58 / Dram Error Address Pointer (32b) 42 #define I82975X_DERRSYN 0x5c /* Dram Error SYNdrome (8b) 44 * 7:0 DRAM ECC Syndrome 47 #define I82975X_DES 0x5d /* Dram ERRor DeSTination (8b) 58 * 9 non-DRAM lock error (ndlock) 61 * 1 ECC UE (multibit DRAM error) 62 * 0 ECC CE (singlebit DRAM error) 76 * 9 non-DRAM lock error (ndlock) 79 * 1 ECC UE (multibit DRAM error) [all …]`
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	uncore-memory.json	3 "BriefDescription": "DRAM Activate Count : All Activates", 8 …DRAM Activate Count : All Activates : Counts the number of DRAM Activate commands sent on this cha… 13 "BriefDescription": "DRAM Activate Count : Activate due to Bypass", 19 …DRAM Activate Count : Activate due to Bypass : Counts the number of DRAM Activate commands sent on… 24 "BriefDescription": "All DRAM CAS commands issued", 29 "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.", 34 "BriefDescription": "All DRAM read CAS commands issued (including underfills)", 39 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… 44 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre", 50 …ption": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD_CAS and WR_C… [all …]
/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A D	uncore-io.json	228 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 239 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 251 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 263 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 275 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 287 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 299 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 311 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 323 "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM", 434 "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM", [all...]
/linux/Documentation/devicetree/bindings/arm/sunxi/
H A D	allwinner,sun4i-a10-mbus.yaml	`51 - description: DRAM controller/PHY registers 57 - const: dram 63 - description: DRAM controller/PHY module clock 64 - description: Register bus clock, shared by MBUS and DRAM 70 - const: dram 141 dram-controller@1c01000 { 152 dram-controller@1c62000 { 156 reg-names = "mbus", "dram"; 160 clock-names = "mbus", "dram", "bus";`
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	memory.json	134 …ion": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram", 137 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM", 144 …ion": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram", 147 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM", 154 …ts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from dram", 157 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.DRAM", 174 … "BriefDescription": "Counts demand code reads that miss the LLC and the data returned from dram", 177 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.DRAM", 184 … "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from dram", 187 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.DRAM",
/linux/tools/perf/pmu-events/arch/x86/knightslanding/
H A D	memory.json	21 …emand code reads and prefetch code read requests that accounts for data responses from DRAM Far.", 31 …and code reads and prefetch code read requests that accounts for data responses from DRAM Local.", 81 …acheable data and L1 prefetch data read requests that accounts for data responses from DRAM Far.", 91 …heable data and L1 prefetch data read requests that accounts for data responses from DRAM Local.", 131 …"BriefDescription": "Counts any Prefetch requests that accounts for data responses from DRAM Far.", 141 …riefDescription": "Counts any Prefetch requests that accounts for data responses from DRAM Local.", 191 … "BriefDescription": "Counts any Read request that accounts for data responses from DRAM Far.", 201 … "BriefDescription": "Counts any Read request that accounts for data responses from DRAM Local.", 251 "BriefDescription": "Counts any request that accounts for data responses from DRAM Far.", 261 "BriefDescription": "Counts any request that accounts for data responses from DRAM Local.", [all …]
/linux/arch/powerpc/platforms/chrp/
H A D	gg2.h	48 #define GG2_PCI_DRAM_BANK0 0x90 /* Control register for DRAM bank #0 / 49 #define GG2_PCI_DRAM_BANK1 0x94 / Control register for DRAM bank #1 / 50 #define GG2_PCI_DRAM_BANK2 0x98 / Control register for DRAM bank #2 / 51 #define GG2_PCI_DRAM_BANK3 0x9c / Control register for DRAM bank #3 / 52 #define GG2_PCI_DRAM_BANK4 0xa0 / Control register for DRAM bank #4 / 53 #define GG2_PCI_DRAM_BANK5 0xa4 / Control register for DRAM bank #5 / 56 #define GG2_PCI_DRAM_CTRL 0xc0 / DRAM control */
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	uncore-memory.json	3 "BriefDescription": "DRAM Activate Count", 8 …: "Counts the number of DRAM Activate commands sent on this channel. Activate commands are issued… 12 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 21 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM Reads (RD_CAS + Underfills)", 30 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 39 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; Underfill Read Issued", 48 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (both Modes)", 57 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read… 66 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Writ… 83 "BriefDescription": "DRAM Precharge All Commands", [all …]

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