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Searched full:combophy (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/phy/st/
H A Dphy-stm32-combophy.c3 * STMicroelectronics COMBOPHY STM32MP25 Controller driver.
116 static int stm32_impedance_tune(struct stm32_combophy *combophy) in stm32_impedance_tune() argument
127 if (!of_property_read_u32(combophy->dev->of_node, "st,output-micro-ohms", &val)) { in stm32_impedance_tune()
129 dev_err(combophy->dev, "Invalid value %u for output ohm\n", val); in stm32_impedance_tune()
140 dev_dbg(combophy->dev, "Set %u micro-ohms output impedance\n", in stm32_impedance_tune()
143 regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, in stm32_impedance_tune()
149 if (!of_property_read_u32(combophy->dev->of_node, "st,output-vswing-microvolt", &val)) { in stm32_impedance_tune()
153 dev_err(combophy->dev, "Invalid value %u for output vswing\n", val); in stm32_impedance_tune()
164 dev_dbg(combophy->dev, "Set %u microvolt swing\n", in stm32_impedance_tune()
167 regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, in stm32_impedance_tune()
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/linux/Documentation/devicetree/bindings/phy/
H A Dintel,combo-phy.yaml7 title: Intel ComboPhy Subsystem
13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
14 controllers. A single Combophy provides two PHY instances.
18 pattern: "combophy(@.*|-([0-9]|[1-9][0-9]+))?$"
22 - const: intel,combophy-lgm
30 - description: ComboPhy core registers
53 - description: ComboPhy instance id
54 description: Chip configuration registers handle and ComboPhy instance id
61 - description: ComboPhy instance id
62 description: HSIO registers handle and ComboPhy instance id on NOC
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H A Dcalxeda-combophy.yaml4 $id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
22 const: calxeda,hb-combophy
31 description: device ID for programming the ComboPHY.
46 compatible = "calxeda,hb-combophy";
/linux/drivers/phy/intel/
H A DKconfig30 bool "Intel Lightning Mountain ComboPHY driver"
37 Enable this to support Intel ComboPhy.
39 This driver configures ComboPhy subsystem on Intel gateway
/linux/Documentation/devicetree/bindings/ata/
H A Dsata_highbank.yaml49 phandle-combophy and lane assignment, which maps each SATA port to a
50 combophy and a lane within that combophy
/linux/arch/arm/boot/dts/calxeda/
H A Decx-common.dtsi218 compatible = "calxeda,hb-combophy";
225 compatible = "calxeda,hb-combophy";
/linux/Documentation/devicetree/bindings/pci/
H A Dst,stm32-pcie-ep.yaml65 phys = <&combophy PHY_TYPE_PCIE>;
H A Dst,stm32-pcie-host.yaml105 phys = <&combophy PHY_TYPE_PCIE>;
/linux/drivers/pci/controller/dwc/
H A Dpcie-stm32.c90 * The core clock is gated with CLKREQ# from the COMBOPHY REFCLK, in stm32_pcie_resume_noirq()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588s-evb1-v10.dts124 combophy_avdd0v85: regulator-combophy-avdd0v85 {
134 combophy_avdd1v8: regulator-combophy-avdd1v8 {
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun55i-a523.c979 static SUNXI_CCU_M_HW_WITH_MUX_GATE(combophy_dsi0_clk, "combophy-dsi0",
986 static SUNXI_CCU_M_HW_WITH_MUX_GATE(combophy_dsi1_clk, "combophy-dsi1",
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c865 dev_err(udphy->dev, "failed to init combophy\n"); in rk_udphy_setup()
/linux/drivers/clk/stm32/
H A Dclk-stm32mp25.c1502 /* USB3 PCIe COMBOPHY */
/linux/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c2322 * and Synopsys SS/USBDP COMBOPHY, managed by external code. in exynos5_usbdrd_phy_probe()