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/linux/drivers/s390/cio/
H A Dcmf.c26 #include <asm/cmb.h>
219 if (!cdev->private->cmb) in set_schib_wait()
287 cmb_data = cdev->private->cmb; in cmf_copy_block()
305 if (!cdev->private->cmb) in cmf_cmb_copy_wait()
355 cmb_data = cdev->private->cmb; in cmf_generic_reset()
370 * struct cmb_area - container for global cmb data
378 struct cmb *mem;
390 /* ****** old style CMB handling ********/
405 * struct cmb - basic channel measurement block
418 * The cmb area made up from these blocks must be a contiguous array and may
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H A Dio_sch.h175 void *cmb; /* measurement information */ member
177 u64 cmb_start_time; /* clock value of cmb reset */
178 void *cmb_wait; /* deferred cmb enable/disable */
H A Ddevice.c31 #include <asm/cmb.h>
/linux/drivers/hwtracing/coresight/
H A Dcoresight-tpdm.c86 drvdata->cmb->trig_patt[tpdm_attr->idx]); in tpdm_simple_dataset_show()
91 drvdata->cmb->trig_patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
96 drvdata->cmb->patt_val[tpdm_attr->idx]); in tpdm_simple_dataset_show()
101 drvdata->cmb->patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
106 drvdata->cmb->msr[tpdm_attr->idx]); in tpdm_simple_dataset_show()
161 drvdata->cmb->trig_patt[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
167 drvdata->cmb->trig_patt_mask[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
173 drvdata->cmb->patt_val[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
179 drvdata->cmb->patt_mask[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
185 drvdata->cmb->msr[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
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H A Dcoresight-tpdm.h12 /* CMB/MCMB Subunit Registers */
14 /* CMB subunit timestamp insertion enable register */
16 /* CMB subunit timestamp pattern registers */
18 /* CMB subunit timestamp pattern mask registers */
20 /* CMB subunit trigger pattern registers */
22 /* CMB subunit trigger pattern mask registers */
24 /* CMB MSR register */
27 /* Enable bit for CMB subunit */
29 /* Trace collection mode for CMB subunit */
37 /* CMB CTI timestamp request */
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H A Dcoresight-tpda.c69 if (tpdm_data->cmb) { in tpdm_read_element_size()
71 "qcom,cmb-element-bits", &drvdata->cmb_esize); in tpdm_read_element_size()
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-coresight-devices-tpdm178 Description: (Write) Set the data collection mode of CMB tpdm. Continuous
179 change creates CMB data set elements on every CMBCLK edge.
180 Trace-on-change creates CMB data set elements only when a new
182 in a CMB data set.
185 0 : Continuous CMB collection mode.
186 1 : Trace-on-change CMB collection mode.
193 (RW) Set/Get the value of the trigger pattern for the CMB
201 (RW) Set/Get the mask of the trigger pattern for the CMB
209 (RW) Set/Get the value of the pattern for the CMB subunit TPDM.
216 (RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
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/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_dev.c225 dev_warn(dev, "Cannot discover CMB layout, disabling CMB\n"); in ionic_map_disc_cmb()
233 dev_warn(dev, "Invalid number of CMB entries (%d)\n", in ionic_map_disc_cmb()
246 dev_dbg(dev, "CMB entry %d: bar_num %u cmb_type %u offset %x length %u\n", in ionic_map_disc_cmb()
252 dev_warn(dev, "Out of bounds CMB region %d offset %x length %u\n", in ionic_map_disc_cmb()
262 dev_warn(dev, "No CMB mapping discovered\n"); in ionic_map_disc_cmb()
269 dev_warn(dev, "region len = 0. No CMB mapping discovered\n"); in ionic_map_disc_cmb()
275 dev_warn(dev, "Unexpected CMB size in entry 0: %u pages\n", in ionic_map_disc_cmb()
284 dev_warn(dev, "No memory for CMB, disabling\n"); in ionic_map_disc_cmb()
309 dev_dbg(dev, "regular cmb mapping: bar->bus_addr %pa region[%d].length %u\n", in ionic_map_disc_cmb()
359 /* classic CMB mapping */ in ionic_map_classic_cmb()
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H A Dionic_lif.c32 * 2 = ... with CMB rings
36 * 3 = ... with CMB rings
671 /* on-chip CMB q descriptors */ in ionic_qcq_alloc()
679 "Cannot allocate queue order %d from cmb: err %d\n", in ionic_qcq_alloc()
686 netdev_err(lif->netdev, "Cannot map queue from cmb\n"); in ionic_qcq_alloc()
2836 /* When changing CMB queue parameters, we're using limited in ionic_cmb_reconfig()
2857 "CMB reconfig failed, restoring values: %d\n", err); in ionic_cmb_reconfig()
2864 "CMB restore failed: %d\n", err); in ionic_cmb_reconfig()
2872 "CMB reconfig failed: %d\n", err); in ionic_cmb_reconfig()
2937 /* Are we changing q params while CMB is on */ in ionic_reconfigure_queues()
/linux/drivers/net/ethernet/atheros/atlx/
H A Datl1.h201 /* CMB/SMB Control Register */
208 /* CMB DMA Write Threshold Register */
215 /* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
222 /* Number of packet received since last CMB write */
225 /* Number of packet transmitted since last CMB write */
376 * CMB to host memory. Software should clear
377 * this bit when CMB info is processed. */
581 * message blocks (cmb, smb) described below
633 /* coalescing message block (cmb) */
635 struct coals_msg_block *cmb; member
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H A Datl1.c1084 /* init CMB */ in atl1_setup_ring_resources()
1085 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size; in atl1_setup_ring_resources()
1086 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0; in atl1_setup_ring_resources()
1087 adapter->cmb.dma += offset; in atl1_setup_ring_resources()
1088 adapter->cmb.cmb = (struct coals_msg_block *) in atl1_setup_ring_resources()
1092 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block); in atl1_setup_ring_resources()
1096 ((u8 *) adapter->cmb.cmb + in atl1_setup_ring_resources()
1234 adapter->cmb.dma = 0; in atl1_free_ring_resources()
1235 adapter->cmb.cmb = NULL; in atl1_free_ring_resources()
1480 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL), in atl1_configure()
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H A Datl2.c597 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */ in atl2_intr()
/linux/arch/s390/include/asm/
H A Dcmb.h5 #include <uapi/asm/cmb.h>
/linux/arch/arm64/boot/dts/qcom/
H A Dhamoa.dtsi6886 qcom,cmb-element-bits = <32>;
6887 qcom,cmb-msrs-num = <32>;
6943 qcom,cmb-element-bits = <32>;
6944 qcom,cmb-msrs-num = <32>;
7081 qcom,cmb-element-bits = <64>;
7082 qcom,cmb-msrs-num = <32>;
7119 qcom,cmb-element-bits = <32>;
7120 qcom,cmb-msrs-num = <32>;
7229 qcom,cmb-element-bits = <64>;
7230 qcom,cmb-msrs-num = <32>;
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H A Dmonaco.dtsi3049 qcom,cmb-element-bits = <32>;
3050 qcom,cmb-msrs-num = <32>;
3311 qcom,cmb-element-bits = <32>;
3312 qcom,cmb-msrs-num = <32>;
3330 qcom,cmb-element-bits = <64>;
3331 qcom,cmb-msrs-num = <32>;
3811 qcom,cmb-element-bits = <64>;
3812 qcom,cmb-msrs-num = <32>;
3830 qcom,cmb-element-bits = <64>;
3831 qcom,cmb-msrs-num = <32>;
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/linux/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_hw.h213 #define IDLE_STATUS_CMB 0x80 /* 1: CMB state machine is in non-IDLE state. 0: CMB is …
495 /* CMB/SMB Control Register */
609 /* Tpd CMB DMA Address */
H A Datl1e.h405 u32 *cmb; member
H A Datl1e_main.c850 /* Init CMB dma address */ in atl1e_setup_ring_resources()
852 tx_ring->cmb = adapter->ring_vir_addr + offset; in atl1e_setup_ring_resources()
/linux/Documentation/driver-api/
H A Ds390-drivers.rst97 .. kernel-doc:: arch/s390/include/uapi/asm/cmb.h
/linux/drivers/nvme/host/
H A Dconstants.c97 [NVME_SC_CMD_NOT_SUP_CMB_QUEUE] = "Command Not Supported for Queue in CMB",
H A Dpci.c2455 * Controllers may support a CMB size larger than their BAR, for in nvme_map_cmb()
2456 * example, due to being behind a bridge. Reduce the CMB to the in nvme_map_cmb()
2467 * Tell the controller about the host side address mapping the CMB, in nvme_map_cmb()
2468 * and enable CMB decoding for the NVMe 1.4+ scheme: in nvme_map_cmb()
2478 "failed to register the CMB\n"); in nvme_map_cmb()
2724 static DEVICE_ATTR_RO(cmb);
/linux/drivers/s390/block/
H A Ddasd_ioctl.c21 #include <asm/cmb.h>
/linux/drivers/infiniband/hw/ionic/
H A Dionic_controlpath.c1759 ibdev_dbg(&dev->ibdev, "could not place sq in cmb as required\n"); in ionic_qp_sq_init_cmb()
1985 ibdev_dbg(&dev->ibdev, "could not place rq in cmb as required\n"); in ionic_qp_rq_init_cmb()