Searched full:cm2 (Results 1 – 21 of 21) sorted by relevance
| /linux/arch/arm/mach-omap2/ |
| H A D | cm2_44xx.h | 3 * OMAP44xx CM2 instance offset macros
25 /* CM2 base address */
31 /* CM2 instances */
44 /* CM2 clockdomain register offsets (from instance start) */
|
| H A D | cm2_54xx.h | 3 * OMAP54xx CM2 instance offset macros
21 /* CM2 base address */
|
| H A D | cm2_7xx.h | 3 * DRA7xx CM2 instance offset macros
22 /* CM2 base address */
|
| H A D | cm44xx.h | 10 * OMAP4 has two separate CM blocks, CM1 and CM2. This file contains
|
| H A D | prcm44xx.h | 11 * the PRM/CM/PRCM blocks on the OMAP4 devices: PRM, CM1, CM2,
|
| H A D | cm_common.c | 34 /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
280 { .compatible = "ti,omap4-cm2", .data = &cm2_data },
|
| H A D | cminst44xx.c | 11 * or CM2 hardware modules. For example, the EMU_CM CM instance is in
|
| /linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | prcm.txt | 19 "ti,omap4-cm2"
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | ti-clkctrl.txt | 32 &cm2 {
|
| /linux/Documentation/devicetree/bindings/cache/ |
| H A D | baikal,bt1-l2-ctl.yaml | 15 tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible
|
| /linux/drivers/iio/light/ |
| H A D | veml6075.c | 283 /* resp = 0.93 c/uW/cm2: scale = 1.75268817 */ in veml6075_read_responsivity()
288 /* resp = 2.1 c/uW/cm2: scale = 0.476190476 */ in veml6075_read_responsivity()
|
| /linux/drivers/memory/ |
| H A D | Kconfig | 68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
|
| H A D | bt1-l2-ctl.c | 8 * Baikal-T1 CM2 L2-cache Control Block driver.
|
| /linux/drivers/bus/ |
| H A D | bt1-axi.c | 198 * Performing unaligned read from the memory will cause the CM2 bus in inject_error_store()
|
| /linux/sound/soc/mediatek/mt8365/ |
| H A D | mt8365-afe-pcm.c | 277 /* TDM_IN interconnect to CM2 */ in mt8365_afe_cm2_mux_conn()
303 /* ref data interconnect to CM2 */ in mt8365_afe_cm2_mux_conn()
344 dev_err(afe->dev, "%s wrong CM2 input %d\n", __func__, input); in mt8365_afe_cm2_mux_conn()
569 /* configure cm2 */ in mt8365_afe_fe_hw_params()
|
| /linux/arch/mips/kernel/ |
| H A D | mips-cm.c | 386 if (revision < CM_REV_CM3) { /* CM2 */ in mips_cm_error_report()
|
| /linux/Documentation/input/joydev/ |
| H A D | joystick.rst | 485 but in the future, Logitech CyberMan (the original one, not CM2) could be
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap4-l4.dtsi | 122 cm2: cm2@0 { label
123 compatible = "ti,omap4-cm2", "simple-bus";
|
| H A D | omap44xx-clocks.dtsi | 1202 &cm2 {
|
| /linux/arch/mips/ |
| H A D | Kconfig | 1528 level features like up to six P5600 calculation cores, CM2 with L2
|
| /linux/drivers/infiniband/hw/qib/ |
| H A D | qib_mad.c | 1168 * Set the most significant bit of CM2 to indicate support for in pma_get_classportinfo()
|