| /linux/drivers/misc/altera-stapl/ |
| H A D | Makefile | 2 altera-stapl-y = altera-jtag.o altera-comp.o altera.o
3 altera-stapl-$(CONFIG_HAS_IOPORT) += altera-lpt.o
5 obj-$(CONFIG_ALTERA_STAPL) += altera-stapl.o
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| H A D | altera-lpt.c | 3 * altera-lpt.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
14 #include "altera-exprt.h"
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| H A D | Kconfig | 2 comment "Altera FPGA firmware download module (requires I2C)"
6 tristate "Altera FPGA firmware download module"
9 An Altera FPGA module. Say Y when you want to support this tool.
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| H A D | altera-exprt.h | 3 * altera-exprt.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
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| H A D | altera-comp.c | 3 * altera-comp.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
13 #include "altera-exprt.h"
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| H A D | altera-jtag.h | 3 * altera-jtag.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-intel-m10-bmc-sec-update | 4 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
14 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
24 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
34 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
42 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
50 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
58 Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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| H A D | sysfs-driver-altera-cvp | 1 What: /sys/bus/pci/drivers/altera-cvp/chkcfg
7 error checking in altera-cvp driver is turned on or
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| /linux/drivers/fpga/ |
| H A D | altera-pr-ip-core-plat.c | 3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
10 #include <linux/fpga/altera-pr-ip-core.h>
45 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
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| H A D | altera-pr-ip-core.c | 3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
11 #include <linux/fpga/altera-pr-ip-core.h>
200 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Core");
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| /linux/Documentation/networking/device_drivers/ethernet/altera/ |
| H A D | altera_tse.rst | 6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
19 For more information visit www.altera.com and www.rocketboards.org. Support
25 components that can be assembled and built into an FPGA using the Altera
44 visit www.altera.com for known, documented SGDMA errata.
61 Altera Triple-Speed Ethernet MAC support (ALTERA_TSE)
147 RFC defined statistics, and driver or Altera defined statistics. The four
154 - Altera Triple Speed Ethernet User Guide, found at http://www.altera.com
274 Altera TSE. This statistics counts the number of received good and errored
[all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | altr,gmii-to-sgmii-2.0.yaml | 2 # Copyright (C) 2025 Altera Corporation
8 title: Altera GMII to SGMII Converter
11 - Matthew Gerlach <matthew.gerlach@altera.com>
14 This binding describes the Altera GMII to SGMII converter.
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| /linux/drivers/gpio/ |
| H A D | gpio-altera-a10sr.c | 5 * GPIO driver for Altera Arria10 MAX5 System Resource Chip
11 #include <linux/mfd/altera-a10sr.h>
17 * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
114 MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
115 MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
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| /linux/drivers/pci/controller/ |
| H A D | pcie-altera-msi.c | 3 * Altera PCIe MSI support
5 * Author: Ley Foon Tan <lftan@altera.com>
7 * Copyright Altera Corporation (C) 2013-2015. All rights reserved
88 .prefix = "Altera-",
105 .name = "Altera MSI",
263 .name = "altera-msi",
283 MODULE_DESCRIPTION("Altera PCIe MSI support driver");
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| /linux/include/linux/fpga/ |
| H A D | altera-pr-ip-core.h | 3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
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| /linux/include/misc/ |
| H A D | altera.h | 3 * altera.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-altera.txt | 1 * Altera I2C Controller
2 * This is Altera's synthesizable logic block I2C Controller for use
3 * in Altera's FPGAs.
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| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | intel,stratix10-soc-fpga-mgr.yaml | 10 - Mahesh Rao <mahesh.rao@altera.com>
11 - Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
12 - Niravkumar L Rabara <nirav.rabara@altera.com>
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| /linux/drivers/media/pci/cx23885/ |
| H A D | Kconfig | 55 tristate "Altera FPGA based CI module"
59 An Altera FPGA CI module for NetUP Dual DVB-T/C RF CI card.
62 module will be called altera-ci
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| /linux/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_vt.dts | 3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
10 model = "Altera SOCFPGA VT";
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| /linux/drivers/mfd/ |
| H A D | altera-a10sr.c | 3 * Altera Arria10 DevKit System Resource MFD Driver
5 * Author: Thor Thayer <tthayer@opensource.altera.com>
9 * SPI access for Altera Arria10 MAX5 System Resource Chip
14 #include <linux/mfd/altera-a10sr.h>
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| /linux/drivers/spi/ |
| H A D | spi-altera-dfl.c | 3 // DFL bus driver for Altera SPI Master
22 #include <linux/spi/altera.h>
190 .name = "dfl-spi-altera",
199 MODULE_DESCRIPTION("DFL spi altera driver");
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| /linux/include/uapi/linux/ |
| H A D | serial_core.h | 29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
31 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
143 /* Altera UARTs */
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| /linux/arch/arm/mach-socfpga/ |
| H A D | socfpga.c | 3 * Copyright (C) 2012-2015 Altera Corporation
99 DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
112 DT_MACHINE_START(SOCFPGA_A10, "Altera SOCFPGA Arria10")
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| /linux/Documentation/devicetree/bindings/arm/altera/ |
| H A D | socfpga-clk-manager.yaml | 4 $id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#
7 title: Altera SOCFPGA Clock Manager
13 This binding describes the Altera SOCFGPA Clock Manager and its associated
|