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/linux/drivers/edac/
H A DKconfig394 bool "Altera SOCFPGA ECC"
398 Altera SOCs. This is the global enable for the
399 various Altera peripherals.
402 bool "Altera SDRAM ECC"
406 Altera SDRAM Memory for Altera SoCs. Note that the
411 bool "Altera L2 Cache ECC"
415 Altera L2 cache Memory for Altera SoCs. This option
419 bool "Altera On-Chip RAM ECC"
423 Altera On-Chip RAM Memory for Altera SoCs.
426 bool "Altera Ethernet FIFO ECC"
[all …]
/linux/drivers/misc/altera-stapl/
H A DMakefile2 altera-stapl-y = altera-jtag.o altera-comp.o altera.o
3 altera-stapl-$(CONFIG_HAS_IOPORT) += altera-lpt.o
5 obj-$(CONFIG_ALTERA_STAPL) += altera-stapl.o
H A Daltera-lpt.c3 * altera-lpt.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
14 #include "altera-exprt.h"
H A DKconfig2 comment "Altera FPGA firmware download module (requires I2C)"
6 tristate "Altera FPGA firmware download module"
9 An Altera FPGA module. Say Y when you want to support this tool.
H A Daltera-exprt.h3 * altera-exprt.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
H A Daltera-comp.c3 * altera-comp.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
13 #include "altera-exprt.h"
H A Daltera-jtag.h3 * altera-jtag.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
/linux/drivers/fpga/
H A Daltera-pr-ip-core-plat.c3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
10 #include <linux/fpga/altera-pr-ip-core.h>
45 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
H A Daltera-hps2fpga.c3 * FPGA to/from HPS Bridge Driver for Altera SoCFPGA Devices
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
13 * This driver manages bridges on a Altera SOCFPGA between the ARM host
217 MODULE_DESCRIPTION("Altera SoCFPGA HPS to FPGA Bridge");
218 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
H A Daltera-pr-ip-core.c3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
11 #include <linux/fpga/altera-pr-ip-core.h>
200 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Core");
H A Daltera-fpga2sdram.c3 * FPGA to SDRAM Bridge Driver for Altera SoCFPGA Devices
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
164 MODULE_DESCRIPTION("Altera SoCFPGA FPGA to SDRAM Bridge");
165 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
/linux/Documentation/networking/device_drivers/ethernet/altera/
H A Daltera_tse.rst6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
19 For more information visit www.altera.com and www.rocketboards.org. Support
25 components that can be assembled and built into an FPGA using the Altera
44 visit www.altera.com for known, documented SGDMA errata.
61 Altera Triple-Speed Ethernet MAC support (ALTERA_TSE)
147 RFC defined statistics, and driver or Altera defined statistics. The four
154 - Altera Triple Speed Ethernet User Guide, found at http://www.altera.com
274 Altera TSE. This statistics counts the number of received good and errored
[all …]
/linux/drivers/gpio/
H A Dgpio-altera-a10sr.c5 * GPIO driver for Altera Arria10 MAX5 System Resource Chip
11 #include <linux/mfd/altera-a10sr.h>
17 * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
114 MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
115 MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
/linux/drivers/dma/
H A Daltera-msgdma.c3 * DMA driver for Altera mSGDMA IP core
206 * @mdev: Pointer to the Altera mSGDMA device structure
227 * @mdev: Pointer to the Altera mSGDMA device structure
245 * @mdev: Pointer to the Altera mSGDMA device structure
531 * @mdev: Pointer to the Altera mSGDMA device structure
547 * @mdev: Pointer to the Altera mSGDMA device structure
581 * @mdev: Pointer to the Altera mSGDMA device structure
609 * @mdev: Pointer to the Altera mSGDMA device structure
626 * @mdev: Pointer to the Altera mSGDMA device structure
683 * @t: Pointer to the Altera sSGDMA channel structure
[all …]
/linux/drivers/pci/controller/
H A Dpcie-altera-msi.c3 * Altera PCIe MSI support
5 * Author: Ley Foon Tan <lftan@altera.com>
7 * Copyright Altera Corporation (C) 2013-2015. All rights reserved
78 .name = "Altera PCIe MSI",
103 .name = "Altera MSI",
266 .name = "altera-msi",
286 MODULE_DESCRIPTION("Altera PCIe MSI support driver");
/linux/include/linux/fpga/
H A Daltera-pr-ip-core.h3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
/linux/include/misc/
H A Daltera.h3 * altera.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
/linux/Documentation/devicetree/bindings/fpga/
H A Daltera-passive-serial.txt1 Altera Passive Serial SPI FPGA Manager
3 Altera FPGAs support a method of loading the bitstream over what is
8 See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-altera.txt1 * Altera I2C Controller
2 * This is Altera's synthesizable logic block I2C Controller for use
3 * in Altera's FPGAs.
/linux/drivers/mfd/
H A Daltera-a10sr.c3 * Altera Arria10 DevKit System Resource MFD Driver
5 * Author: Thor Thayer <tthayer@opensource.altera.com>
9 * SPI access for Altera Arria10 MAX5 System Resource Chip
14 #include <linux/mfd/altera-a10sr.h>
/linux/drivers/media/pci/cx23885/
H A DKconfig55 tristate "Altera FPGA based CI module"
59 An Altera FPGA CI module for NetUP Dual DVB-T/C RF CI card.
62 module will be called altera-ci
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_vt.dts3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
10 model = "Altera SOCFPGA VT";
/linux/drivers/tty/serial/
H A Daltera_jtaguart.c3 * altera_jtaguart.c -- Altera JTAG UART driver
30 * Altera JTAG UART register definitions according to the Altera JTAG UART
31 * datasheet: https://www.altera.com/literature/hb/nios2/n2cpu_nii51009.pdf
178 pr_err(DRV_NAME ": unable to attach Altera JTAG UART %d " in altera_jtaguart_startup()
213 return (port->type == PORT_ALTERA_JTAGUART) ? "Altera JTAG UART" : NULL; in altera_jtaguart_type()
481 MODULE_DESCRIPTION("Altera JTAG UART driver");
/linux/drivers/spi/
H A Dspi-altera-dfl.c3 // DFL bus driver for Altera SPI Master
22 #include <linux/spi/altera.h>
190 .name = "dfl-spi-altera",
199 MODULE_DESCRIPTION("DFL spi altera driver");
/linux/include/uapi/linux/
H A Dserial_core.h29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
31 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
143 /* Altera UARTs */

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