Merge tag 'pci-v6.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull PCI updates from Bjorn Helgaas:
"Enumeration:

- Allow built-in drivers, not just modular drivers, to

Merge tag 'pci-v6.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull PCI updates from Bjorn Helgaas:
"Enumeration:

- Allow built-in drivers, not just modular drivers, to use async
initial probing (Lukas Wunner)

- Support Immediate Readiness even on devices with no PM Capability
(Sean Christopherson)

- Consolidate definition of PCIE_RESET_CONFIG_WAIT_MS (100ms), the
required delay between a reset and sending config requests to a
device (Niklas Cassel)

- Add pci_is_display() to check for "Display" base class and use it
in ALSA hda, vfio, vga_switcheroo, vt-d (Mario Limonciello)

- Allow 'isolated PCI functions' (multi-function devices without a
function 0) for LoongArch, similar to s390 and jailhouse (Huacai
Chen)

Power control:

- Add ability to enable optional slot clock for cases where the PCIe
host controller and the slot are supplied by different clocks
(Marek Vasut)

PCIe native device hotplug:

- Fix runtime PM ref imbalance on Hot-Plug Capable ports caused by
misinterpreting a config read failure after a device has been
removed (Lukas Wunner)

- Avoid creating a useless PCIe port service device for pciehp if the
slot is handled by the ACPI hotplug driver (Lukas Wunner)

- Ignore ACPI hotplug slots when calculating depth of pciehp hotplug
ports (Lukas Wunner)

Virtualization:

- Save VF resizable BAR state and restore it after reset (Michał
Winiarski)

- Allow IOV resources (VF BARs) to be resized (Michał Winiarski)

- Add pci_iov_vf_bar_set_size() so drivers can control VF BAR size
(Michał Winiarski)

Endpoint framework:

- Add RC-to-EP doorbell support using platform MSI controller,
including a test case (Frank Li)

- Allow BAR assignment via configfs so platforms have flexibility in
determining BAR usage (Jerome Brunet)

Native PCIe controller drivers:

- Convert amazon,al-alpine-v[23]-pcie, apm,xgene-pcie,
axis,artpec6-pcie, marvell,armada-3700-pcie, st,spear1340-pcie to
DT schema format (Rob Herring)

- Use dev_fwnode() instead of of_fwnode_handle() to remove OF
dependency in altera (fixes an unused variable), designware-host,
mediatek, mediatek-gen3, mobiveil, plda, xilinx, xilinx-dma,
xilinx-nwl (Jiri Slaby, Arnd Bergmann)

- Convert aardvark, altera, brcmstb, designware-host, iproc,
mediatek, mediatek-gen3, mobiveil, plda, rcar-host, vmd, xilinx,
xilinx-dma, xilinx-nwl from using pci_msi_create_irq_domain() to
using msi_create_parent_irq_domain() instead; this makes the
interrupt controller per-PCI device, allows dynamic allocation of
vectors after initialization, and allows support of IMS (Nam Cao)

APM X-Gene PCIe controller driver:

- Rewrite MSI handling to MSI CPU affinity, drop useless CPU hotplug
bits, use device-managed memory allocations, and clean things up
(Marc Zyngier)

- Probe xgene-msi as a standard platform driver rather than a
subsys_initcall (Marc Zyngier)

Broadcom STB PCIe controller driver:

- Add optional DT 'num-lanes' property and if present, use it to
override the Maximum Link Width advertised in Link Capabilities
(Jim Quinlan)

Cadence PCIe controller driver:

- Use PCIe Message routing types from the PCI core rather than
defining private ones (Hans Zhang)

Freescale i.MX6 PCIe controller driver:

- Add IMX8MQ_EP third 64-bit BAR in epc_features (Richard Zhu)

- Add IMX8MM_EP and IMX8MP_EP fixed 256-byte BAR 4 in epc_features
(Richard Zhu)

- Configure LUT for MSI/IOMMU in Endpoint mode so Root Complex can
trigger doorbel on Endpoint (Frank Li)

- Remove apps_reset (LTSSM_EN) from
imx_pcie_{assert,deassert}_core_reset(), which fixes a hotplug
regression on i.MX8MM (Richard Zhu)

- Delay Endpoint link start until configfs 'start' written (Richard
Zhu)

Intel VMD host bridge driver:

- Add Intel Panther Lake (PTL)-H/P/U Vendor ID (George D Sworo)

Qualcomm PCIe controller driver:

- Add DT binding and driver support for SA8255p, which supports ECAM
for Configuration Space access (Mayank Rana)

- Update DT binding and driver to describe PHYs and per-Root Port
resets in a Root Port stanza and deprecate describing them in the
host bridge; this makes it possible to support multiple Root Ports
in the future (Krishna Chaitanya Chundru)

- Add Qualcomm QCS615 to SM8150 DT binding (Ziyue Zhang)

- Add Qualcomm QCS8300 to SA8775p DT binding (Ziyue Zhang)

- Drop TBU and ref clocks from Qualcomm SM8150 and SC8180x DT
bindings (Konrad Dybcio)

- Document 'link_down' reset in Qualcomm SA8775P DT binding (Ziyue
Zhang)

- Add required PCIE_RESET_CONFIG_WAIT_MS delay after Link up IRQ
(Niklas Cassel)

Rockchip PCIe controller driver:

- Drop unused PCIe Message routing and code definitions (Hans Zhang)

- Remove several unused header includes (Hans Zhang)

- Use standard PCIe config register definitions instead of
rockchip-specific redefinitions (Geraldo Nascimento)

- Set Target Link Speed to 5.0 GT/s before retraining so we have a
chance to train at a higher speed (Geraldo Nascimento)

Rockchip DesignWare PCIe controller driver:

- Prevent race between link training and register update via DBI by
inhibiting link training after hot reset and link down (Wilfred
Mallawa)

- Add required PCIE_RESET_CONFIG_WAIT_MS delay after Link up IRQ
(Niklas Cassel)

Sophgo PCIe controller driver:

- Add DT binding and driver for Sophgo SG2044 PCIe controller driver
in Root Complex mode (Inochi Amaoto)

Synopsys DesignWare PCIe controller driver:

- Add required PCIE_RESET_CONFIG_WAIT_MS after waiting for Link up on
Ports that support > 5.0 GT/s. Slower Ports still rely on the
not-quite-correct PCIE_LINK_WAIT_SLEEP_MS 90ms default delay while
waiting for the Link (Niklas Cassel)"

* tag 'pci-v6.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (116 commits)
dt-bindings: PCI: qcom,pcie-sa8775p: Document 'link_down' reset
dt-bindings: PCI: Remove 83xx-512x-pci.txt
dt-bindings: PCI: Convert amazon,al-alpine-v[23]-pcie to DT schema
dt-bindings: PCI: Convert marvell,armada-3700-pcie to DT schema
dt-bindings: PCI: Convert apm,xgene-pcie to DT schema
dt-bindings: PCI: Convert axis,artpec6-pcie to DT schema
dt-bindings: PCI: Convert st,spear1340-pcie to DT schema
PCI: Move is_pciehp check out of pciehp_is_native()
PCI: pciehp: Use is_pciehp instead of is_hotplug_bridge
PCI/portdrv: Use is_pciehp instead of is_hotplug_bridge
PCI/ACPI: Fix runtime PM ref imbalance on Hot-Plug Capable ports
selftests: pci_endpoint: Add doorbell test case
misc: pci_endpoint_test: Add doorbell test case
PCI: endpoint: pci-epf-test: Add doorbell test support
PCI: endpoint: Add pci_epf_align_inbound_addr() helper for inbound address alignment
PCI: endpoint: pci-ep-msi: Add checks for MSI parent and mutability
PCI: endpoint: Add RC-to-EP doorbell support using platform MSI controller
PCI: dwc: Add Sophgo SG2044 PCIe controller driver in Root Complex mode
PCI: vmd: Switch to msi_create_parent_irq_domain()
PCI: vmd: Convert to lock guards
...

show more ...

Merge branch 'pci/controller/msi-parent'

- Use dev_fwnode() instead of of_fwnode_handle() to remove OF dependency
in altera (fixes an unused variable), designware-host, mediatek,
mediatek-gen3,

Merge branch 'pci/controller/msi-parent'

- Use dev_fwnode() instead of of_fwnode_handle() to remove OF dependency
in altera (fixes an unused variable), designware-host, mediatek,
mediatek-gen3, mobiveil, plda, xilinx, xilinx-dma, xilinx-nwl (Jiri
Slaby, Arnd Bergmann)

- Convert aardvark, altera, brcmstb, designware-host, iproc, mediatek,
mediatek-gen3, mobiveil, plda, rcar-host, vmd, xilinx, xilinx-dma,
xilinx-nwl from using pci_msi_create_irq_domain() to using
msi_create_parent_irq_domain() instead; this makes the interrupt
controller per-PCI device, allows dynamic allocation of vectors after
initialization, and allows support of IMS (Nam Cao)

- Convert vmd to using lock guards to tidy the code (Nam Cao)

* pci/controller/msi-parent:
PCI: vmd: Switch to msi_create_parent_irq_domain()
PCI: vmd: Convert to lock guards
PCI: plda: Switch to msi_create_parent_irq_domain()
PCI: xilinx: Switch to msi_create_parent_irq_domain()
PCI: xilinx-nwl: Switch to msi_create_parent_irq_domain()
PCI: xilinx-xdma: Switch to msi_create_parent_irq_domain()
PCI: rcar-host: Switch to msi_create_parent_irq_domain()
PCI: mediatek: Switch to msi_create_parent_irq_domain()
PCI: mediatek-gen3: Switch to msi_create_parent_irq_domain()
PCI: iproc: Switch to msi_create_parent_irq_domain()
PCI: brcmstb: Switch to msi_create_parent_irq_domain()
PCI: altera-msi: Switch to msi_create_parent_irq_domain()
PCI: aardvark: Switch to msi_create_parent_irq_domain()
PCI: mobiveil: Switch to msi_create_parent_irq_domain()
PCI: dwc: Switch to msi_create_parent_irq_domain()
PCI: controller: Use dev_fwnode() instead of of_fwnode_handle()

show more ...

Merge branch 'for-6.17/amd-sfh' into for-linus

- add support for operating modes (Basavaraj Natikar)

PCI: vmd: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@

PCI: vmd: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, wrap long lines, squash fix
from https://lore.kernel.org/r/20250716201216.TsY3Kn45@linutronix.de]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/de3f1d737831b251e9cd2cbf9e4c732a5bbba13a.1750858083.git.namcao@linutronix.de

show more ...

PCI: xilinx: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namc

PCI: xilinx: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/b1353c797ce53714c22823de3bd2ae3d09fcd84f.1750858083.git.namcao@linutronix.de

show more ...

PCI: xilinx-nwl: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <

PCI: xilinx-nwl: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/5ac6e216bf2eaa438c8854baf2ff3e5cf0b2284f.1750858083.git.namcao@linutronix.de

show more ...

PCI: xilinx-xdma: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao

PCI: xilinx-xdma: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/b4620dc1808f217a69d0ae50700ffa12ffd657eb.1750858083.git.namcao@linutronix.de

show more ...

PCI: rcar-host: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <n

PCI: rcar-host: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/ab4005db0a829549be1f348f6c27be50a2118b5e.1750858083.git.namcao@linutronix.de

show more ...

PCI: mediatek: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <na

PCI: mediatek: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/76f6e6ce6021607cd0fdfd79fef7d2eb69d9f361.1750858083.git.namcao@linutronix.de

show more ...

PCI: mediatek-gen3: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Ca

PCI: mediatek-gen3: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message & fixed merge conflict]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/bfbd2e375269071b69e1aa85e629ee4b7c99518f.1750858083.git.namcao@linutronix.de

show more ...

PCI: iproc: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namca

PCI: iproc: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message & squashed the kdoc cleanup patch]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/53946d74caf1fd134a1820eac82c3cf64d48779f.1750858083.git.namcao@linutronix.de

show more ...

PCI: brcmstb: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <nam

PCI: brcmstb: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/fa72703e06c2ee2c7554082c7152913eb0dd294f.1750858083.git.namcao@linutronix.de

show more ...

PCI: altera-msi: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <

PCI: altera-msi: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/0a88da04bb82bd588828a7889e9d58c515ea5dbb.1750858083.git.namcao@linutronix.de

show more ...

PCI: aardvark: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <na

PCI: aardvark: Switch to msi_create_parent_irq_domain()

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain()
which was using legacy MSI domain setup.

Signed-off-by: Nam Cao <namcao@linutronix.de>
[mani: reworded commit message]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
[bhelgaas: rebase on dev_fwnode() conversion]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://patch.msgid.link/68b2f9387bbe4f08bcd428bfab83ad1219fb8d80.1750858083.git.namcao@linutronix.de

show more ...

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

show more ...

Merge drm/drm-next into drm-misc-next

Backmerging to forward to v6.16-rc1

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-xe-next

Backmerging to bring in 6.16

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Merge drm/drm-next into drm-intel-next

Sync to v6.16-rc1, among other things to get the fixed size GENMASK_U*()
and BIT_U*() macros.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge tag 'pci-v6.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull pci updates from Bjorn Helgaas:
"Enumeration:

- Print the actual delay time in pci_bridge_wait_for_se

Merge tag 'pci-v6.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull pci updates from Bjorn Helgaas:
"Enumeration:

- Print the actual delay time in pci_bridge_wait_for_secondary_bus()
instead of assuming it was 1000ms (Wilfred Mallawa)

- Revert 'iommu/amd: Prevent binding other PCI drivers to IOMMU PCI
devices', which broke resume from system sleep on AMD platforms and
has been fixed by other commits (Lukas Wunner)

Resource management:

- Remove mtip32xx use of pcim_iounmap_regions(), which is deprecated
and unnecessary (Philipp Stanner)

- Remove pcim_iounmap_regions() and pcim_request_region_exclusive()
and related flags since all uses have been removed (Philipp
Stanner)

- Rework devres 'request' functions so they are no longer 'hybrid',
i.e., their behavior no longer depends on whether
pcim_enable_device or pci_enable_device() was used, and remove
related code (Philipp Stanner)

- Warn (not BUG()) about failure to assign optional resources (Ilpo
Järvinen)

Error handling:

- Log the DPC Error Source ID only when it's actually valid (when
ERR_FATAL or ERR_NONFATAL was received from a downstream device)
and decode into bus/device/function (Bjorn Helgaas)

- Determine AER log level once and save it so all related messages
use the same level (Karolina Stolarek)

- Use KERN_WARNING, not KERN_ERR, when logging PCIe Correctable
Errors (Karolina Stolarek)

- Ratelimit PCIe Correctable and Non-Fatal error logging, with sysfs
controls on interval and burst count, to avoid flooding logs and
RCU stall warnings (Jon Pan-Doh)

Power management:

- Increment PM usage counter when probing reset methods so we don't
try to read config space of a powered-off device (Alex Williamson)

- Set all devices to D0 during enumeration to ensure ACPI opregion is
connected via _REG (Mario Limonciello)

Power control:

- Rename pwrctrl Kconfig symbols from 'PWRCTL' to 'PWRCTRL' to match
the filename paths. Retain old deprecated symbols for
compatibility, except for the pwrctrl slot driver
(PCI_PWRCTRL_SLOT) (Johan Hovold)

- When unregistering pwrctrl, cancel outstanding rescan work before
cleaning up data structures to avoid use-after-free issues (Brian
Norris)

Bandwidth control:

- Simplify link bandwidth controller by replacing the count of Link
Bandwidth Management Status (LBMS) events with a PCI_LINK_LBMS_SEEN
flag (Ilpo Järvinen)

- Update the Link Speed after retraining, since the Link Speed may
have changed (Ilpo Järvinen)

PCIe native device hotplug:

- Ignore Presence Detect Changed caused by DPC.

pciehp already ignores Link Down/Up events caused by DPC, but on
slots using in-band presence detect, DPC causes a spurious Presence
Detect Changed event (Lukas Wunner)

- Ignore Link Down/Up caused by Secondary Bus Reset.

On hotplug ports using in-band presence detect, the reset causes a
Presence Detect Changed event, which mistakenly caused teardown and
re-enumeration of the device. Drivers may need to annotate code
that resets their device (Lukas Wunner)

Virtualization:

- Add an ACS quirk for Loongson Root Ports that don't advertise ACS
but don't allow peer-to-peer transactions between Root Ports; the
quirk allows each Root Port to be in a separate IOMMU group (Huacai
Chen)

Endpoint framework:

- For fixed-size BARs, retain both the actual size and the possibly
larger size allocated to accommodate iATU alignment requirements
(Jerome Brunet)

- Simplify ctrl/SPAD space allocation and avoid allocating more space
than needed (Jerome Brunet)

- Correct MSI-X PBA offset calculations for DesignWare and Cadence
endpoint controllers (Niklas Cassel)

- Align the return value (number of interrupts) encoding for
pci_epc_get_msi()/pci_epc_ops::get_msi() and
pci_epc_get_msix()/pci_epc_ops::get_msix() (Niklas Cassel)

- Align the nr_irqs parameter encoding for
pci_epc_set_msi()/pci_epc_ops::set_msi() and
pci_epc_set_msix()/pci_epc_ops::set_msix() (Niklas Cassel)

Common host controller library:

- Convert pci-host-common to a library so platforms that don't need
native host controller drivers don't need to include these helper
functions (Manivannan Sadhasivam)

Apple PCIe controller driver:

- Extract ECAM bridge creation helper from pci_host_common_probe() to
separate driver-specific things like MSI from PCI things (Marc
Zyngier)

- Dynamically allocate RID-to_SID bitmap to prepare for SoCs with
varying capabilities (Marc Zyngier)

- Skip ports disabled in DT when setting up ports (Janne Grunau)

- Add t6020 compatible string (Alyssa Rosenzweig)

- Add T602x PCIe support (Hector Martin)

- Directly set/clear INTx mask bits because T602x dropped the
accessors that could do this without locking (Marc Zyngier)

- Move port PHY registers to their own reg items to accommodate
T602x, which moves them around; retain default offsets for existing
DTs that lack phy%d entries with the reg offsets (Hector Martin)

- Stop polling for core refclk, which doesn't work on T602x and the
bootloader has already done anyway (Hector Martin)

- Use gpiod_set_value_cansleep() when asserting PERST# in probe
because we're allowed to sleep there (Hector Martin)

Cadence PCIe controller driver:

- Drop a runtime PM 'put' to resolve a runtime atomic count underflow
(Hans Zhang)

- Make the cadence core buildable as a module (Kishon Vijay Abraham I)

- Add cdns_pcie_host_disable() and cdns_pcie_ep_disable() for use by
loadable drivers when they are removed (Siddharth Vadapalli)

Freescale i.MX6 PCIe controller driver:

- Apply link training workaround only on IMX6Q, IMX6SX, IMX6SP
(Richard Zhu)

- Remove redundant dw_pcie_wait_for_link() from
imx_pcie_start_link(); since the DWC core does this, imx6 only
needs it when retraining for a faster link speed (Richard Zhu)

- Toggle i.MX95 core reset to align with PHY powerup (Richard Zhu)

- Set SYS_AUX_PWR_DET to work around i.MX95 ERR051624 erratum: in
some cases, the controller can't exit 'L23 Ready' through Beacon or
PERST# deassertion (Richard Zhu)

- Clear GEN3_ZRXDC_NONCOMPL to work around i.MX95 ERR051586 erratum:
controller can't meet 2.5 GT/s ZRX-DC timing when operating at 8
GT/s, causing timeouts in L1 (Richard Zhu)

- Wait for i.MX95 PLL lock before enabling controller (Richard Zhu)

- Save/restore i.MX95 LUT for suspend/resume (Richard Zhu)

Mobiveil PCIe controller driver:

- Return bool (not int) for link-up check in
mobiveil_pab_ops.link_up() and layerscape-gen4, mobiveil (Hans
Zhang)

NVIDIA Tegra194 PCIe controller driver:

- Create debugfs directory for 'aspm_state_cnt' only when
CONFIG_PCIEASPM is enabled, since there are no other entries (Hans
Zhang)

Qualcomm PCIe controller driver:

- Add OF support for parsing DT 'eq-presets-<N>gts' property for lane
equalization presets (Krishna Chaitanya Chundru)

- Read Maximum Link Width from the Link Capabilities register if DT
lacks 'num-lanes' property (Krishna Chaitanya Chundru)

- Add Physical Layer 64 GT/s Capability ID and register offsets for
8, 32, and 64 GT/s lane equalization registers (Krishna Chaitanya
Chundru)

- Add generic dwc support for configuring lane equalization presets
(Krishna Chaitanya Chundru)

- Add DT and driver support for PCIe on IPQ5018 SoC (Nitheesh Sekar)

Renesas R-Car PCIe controller driver:

- Describe endpoint BAR 4 as being fixed size (Jerome Brunet)

- Document how to obtain R-Car V4H (r8a779g0) controller firmware
(Yoshihiro Shimoda)

Rockchip PCIe controller driver:

- Reorder rockchip_pci_core_rsts because
reset_control_bulk_deassert() deasserts in reverse order, to fix a
link training regression (Jensen Huang)

- Mark RK3399 as being capable of raising INTx interrupts (Niklas
Cassel)

Rockchip DesignWare PCIe controller driver:

- Check only PCIE_LINKUP, not LTSSM status, to determine whether the
link is up (Shawn Lin)

- Increase N_FTS (used in L0s->L0 transitions) and enable ASPM L0s
for Root Complex and Endpoint modes (Shawn Lin)

- Hide the broken ATS Capability in rockchip_pcie_ep_init() instead
of rockchip_pcie_ep_pre_init() so it stays hidden after PERST#
resets non-sticky registers (Shawn Lin)

- Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
(Diederik de Haas)

Synopsys DesignWare PCIe controller driver:

- Set PORT_LOGIC_LINK_WIDTH to one lane to make initial link training
more robust; this will not affect the intended link width if all
lanes are functional (Wenbin Yao)

- Return bool (not int) for link-up check in dw_pcie_ops.link_up()
and armada8k, dra7xx, dw-rockchip, exynos, histb, keembay,
keystone, kirin, meson, qcom, qcom-ep, rcar_gen4, spear13xx,
tegra194, uniphier, visconti (Hans Zhang)

- Add debugfs support for exposing DWC device-specific PTM context
(Manivannan Sadhasivam)

TI J721E PCIe driver:

- Make j721e buildable as a loadable and removable module (Siddharth
Vadapalli)

- Fix j721e host/endpoint dependencies that result in link failures
in some configs (Arnd Bergmann)

Device tree bindings:

- Add qcom DT binding for 'global' interrupt (PCIe controller and
link-specific events) for ipq8074, ipq8074-gen3, ipq6018, sa8775p,
sc7280, sc8180x sdm845, sm8150, sm8250, sm8350 (Manivannan
Sadhasivam)

- Add qcom DT binding for 8 MSI SPI interrupts for msm8998, ipq8074,
ipq8074-gen3, ipq6018 (Manivannan Sadhasivam)

- Add dw rockchip DT binding for rk3576 and rk3562 (Kever Yang)

- Correct indentation and style of examples in brcm,stb-pcie,
cdns,cdns-pcie-ep, intel,keembay-pcie-ep, intel,keembay-pcie,
microchip,pcie-host, rcar-pci-ep, rcar-pci-host, xilinx-versal-cpm
(Krzysztof Kozlowski)

- Convert Marvell EBU (dove, kirkwood, armada-370, armada-xp) and
armada8k from text to schema DT bindings (Rob Herring)

- Remove obsolete .txt DT bindings for content that has been moved to
schemas (Rob Herring)

- Add qcom DT binding for MHI registers in IPQ5332, IPQ6018, IPQ8074
and IPQ9574 (Varadarajan Narayanan)

- Convert v3,v360epc-pci from text to DT schema binding (Rob Herring)

- Change microchip,pcie-host DT binding to be 'dma-noncoherent' since
PolarFire may be configured that way (Conor Dooley)

Miscellaneous:

- Drop 'pci' suffix from intel_mid_pci.c filename to match similar
files (Andy Shevchenko)

- All platforms with PCI have an MMU, so add PCI Kconfig dependency
on MMU to simplify build testing and avoid inadvertent build
regressions (Arnd Bergmann)

- Update Krzysztof Wilczyński's email address in MAINTAINERS
(Krzysztof Wilczyński)

- Update Manivannan Sadhasivam's email address in MAINTAINERS
(Manivannan Sadhasivam)"

* tag 'pci-v6.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (147 commits)
MAINTAINERS: Update Manivannan Sadhasivam email address
PCI: j721e: Fix host/endpoint dependencies
PCI: j721e: Add support to build as a loadable module
PCI: cadence-ep: Introduce cdns_pcie_ep_disable() helper for cleanup
PCI: cadence-host: Introduce cdns_pcie_host_disable() helper for cleanup
PCI: cadence: Add support to build pcie-cadence library as a kernel module
MAINTAINERS: Update Krzysztof Wilczyński email address
PCI: Remove unnecessary linesplit in __pci_setup_bridge()
PCI: WARN (not BUG()) when we fail to assign optional resources
PCI: Remove unused pci_printk()
PCI: qcom: Replace PERST# sleep time with proper macro
PCI: dw-rockchip: Replace PERST# sleep time with proper macro
PCI: host-common: Convert to library for host controller drivers
PCI/ERR: Remove misleading TODO regarding kernel panic
PCI: cadence: Remove duplicate message code definitions
PCI: endpoint: Align pci_epc_set_msix(), pci_epc_ops::set_msix() nr_irqs encoding
PCI: endpoint: Align pci_epc_set_msi(), pci_epc_ops::set_msi() nr_irqs encoding
PCI: endpoint: Align pci_epc_get_msix(), pci_epc_ops::get_msix() return value encoding
PCI: endpoint: Align pci_epc_get_msi(), pci_epc_ops::get_msi() return value encoding
PCI: cadence-ep: Correct PBA offset in .set_msix() callback
...

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Merge branch 'pci/controller/dw-rockchip'

- Check only PCIE_LINKUP, not LTSSM status, to determine whether the link
is up (Shawn Lin)

- Increase N_FTS (used in L0s->L0 transitions) and enable ASP

Merge branch 'pci/controller/dw-rockchip'

- Check only PCIE_LINKUP, not LTSSM status, to determine whether the link
is up (Shawn Lin)

- Increase N_FTS (used in L0s->L0 transitions) and enable ASPM L0s for Root
Complex and Endpoint modes (Shawn Lin)

- Hide the broken ATS Capability in rockchip_pcie_ep_init() instead of
rockchip_pcie_ep_pre_init() so it stays hidden after PERST# resets
non-sticky registers (Shawn Lin)

- Remove unused PCIE_CLIENT_GENERAL_DEBUG definition (Hans Zhang)

- Organize register and bitfield definitions logically (Hans Zhang)

- Use rockchip_pcie_link_up() to check link up instead of open coding, and
use GENMASK() and FIELD_GET() when possible (Hans Zhang)

- Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
(Diederik de Haas)

- Return bool (not int) for link-up check in dw_pcie_ops.link_up() and
armada8k, dra7xx, dw-rockchip, exynos, histb, keembay, keystone, kirin,
meson, qcom, qcom-ep, rcar_gen4, spear13xx, tegra194, uniphier, visconti
(Hans Zhang)

- Return bool (not int) for link-up check in mobiveil_pab_ops.link_up() and
layerscape-gen4, mobiveil (Hans Zhang)

- Simplify j721e link-up check (Hans Zhang)

- Convert pci-host-common to a library so platforms that don't need native
host controller drivers don't need to include these helper functions
(Manivannan Sadhasivam)

* pci/controller/dw-rockchip:
PCI: qcom: Replace PERST# sleep time with proper macro
PCI: dw-rockchip: Replace PERST# sleep time with proper macro
PCI: host-common: Convert to library for host controller drivers
PCI: cadence: Simplify J721e link status check
PCI: mobiveil: Return bool from link up check
PCI: dwc: Return bool from link up check
PCI: dw-rockchip: Fix PHY function call sequence in rockchip_pcie_phy_deinit()
PCI: dw-rockchip: Use rockchip_pcie_link_up() to check link up instead of open coding
PCI: dw-rockchip: Reorganize register and bitfield definitions
PCI: dw-rockchip: Remove unused PCIE_CLIENT_GENERAL_DEBUG definition
PCI: dw-rockchip: Move rockchip_pcie_ep_hide_broken_ats_cap_rk3588() to dw_pcie_ep_ops::init()
PCI: dw-rockchip: Enable ASPM L0s capability for both RC and EP modes
PCI: dw-rockchip: Remove PCIE_L0S_ENTRY check from rockchip_pcie_link_up()

# Conflicts:
# drivers/pci/controller/pcie-apple.c
# include/linux/pci-ecam.h

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PCI: host-common: Convert to library for host controller drivers

This common library will be used as a placeholder for helper functions
shared by the host controller drivers. This avoids placing the

PCI: host-common: Convert to library for host controller drivers

This common library will be used as a placeholder for helper functions
shared by the host controller drivers. This avoids placing the host
controller drivers specific helpers in drivers/pci/*.c, to avoid enlarging
the kernel image on platforms that do not use host controller drivers at
all (like x86/ACPI platforms).

Suggested-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20250508-pcie-reset-slot-v4-3-7050093e2b50@linaro.org

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Merge tag 'irq-msi-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI updates from Thomas Gleixner:
"Updates for the MSI subsystem (core code and PCI):

- Switch the M

Merge tag 'irq-msi-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI updates from Thomas Gleixner:
"Updates for the MSI subsystem (core code and PCI):

- Switch the MSI descriptor locking to lock guards

- Replace a broken and naive implementation of PCI/MSI-X control word
updates in the PCI/TPH driver with a properly serialized variant in
the PCI/MSI core code.

- Remove the MSI descriptor abuse in the SCCI/UFS/QCOM driver by
replacing the direct access to the MSI descriptors with the proper
API function calls. People will never understand that APIs exist
for a reason...

- Provide core infrastructre for the upcoming PCI endpoint library
extensions. Currently limited to ARM GICv3+, but in theory
extensible to other architectures.

- Provide a MSI domain::teardown() callback, which allows drivers to
undo the effects of the prepare() callback.

- Move the MSI domain::prepare() callback invocation to domain
creation time to avoid redundant (and in case of ARM/GIC-V3-ITS
confusing) invocations on every allocation.

In combination with the new teardown callback this removes some
ugly hacks in the GIC-V3-ITS driver, which pretended to work around
the short comings of the core code so far. With this update the
code is correct by design and implementation.

- Make the irqchip MSI library globally available, provide a MSI
parent domain creation helper and convert a bunch of (PCI/)MSI
drivers over to the modern MSI parent mechanism. This is the first
step to get rid of at least one incarnation of the three PCI/MSI
management schemes.

- The usual small cleanups and improvements"

* tag 'irq-msi-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (33 commits)
PCI/MSI: Use bool for MSI enable state tracking
PCI: tegra: Convert to MSI parent infrastructure
PCI: xgene: Convert to MSI parent infrastructure
PCI: apple: Convert to MSI parent infrastructure
irqchip/msi-lib: Honour the MSI_FLAG_NO_AFFINITY flag
irqchip/mvebu: Convert to msi_create_parent_irq_domain() helper
irqchip/gic: Convert to msi_create_parent_irq_domain() helper
genirq/msi: Add helper for creating MSI-parent irq domains
irqchip: Make irq-msi-lib.h globally available
irqchip/gic-v3-its: Use allocation size from the prepare call
genirq/msi: Engage the .msi_teardown() callback on domain removal
genirq/msi: Move prepare() call to per-device allocation
irqchip/gic-v3-its: Implement .msi_teardown() callback
genirq/msi: Add .msi_teardown() callback as the reverse of .msi_prepare()
irqchip/gic-v3-its: Add support for device tree msi-map and msi-mask
dt-bindings: PCI: pci-ep: Add support for iommu-map and msi-map
irqchip/gic-v3-its: Set IRQ_DOMAIN_FLAG_MSI_IMMUTABLE for ITS
irqdomain: Add IRQ_DOMAIN_FLAG_MSI_IMMUTABLE and irq_domain_is_msi_immutable()
platform-msi: Add msi_remove_device_irq_domain() in platform_device_msi_free_irqs_all()
genirq/msi: Rename msi_[un]lock_descs()
...

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PCI: tegra: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
Tegra PCIe driver to the MSI-parent infrastructure and let each device have
it

PCI: tegra: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
Tegra PCIe driver to the MSI-parent infrastructure and let each device have
its own MSI domain.

[ tglx: Moved the struct out of the function call argument ]

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250513172819.2216709-10-maz@kernel.org

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PCI: xgene: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
XGENE PCIe driver to the MSI-parent infrastructure and let each device have
it

PCI: xgene: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
XGENE PCIe driver to the MSI-parent infrastructure and let each device have
its own MSI domain.

[ tglx: Moved the struct out of the function call argument ]

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250513172819.2216709-9-maz@kernel.org

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PCI: apple: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
Apple PCIe driver to the MSI-parent infrastructure and let each device have
it

PCI: apple: Convert to MSI parent infrastructure

In an effort to move ARM64 away from the legacy MSI setup, convert the
Apple PCIe driver to the MSI-parent infrastructure and let each device have
its own MSI domain.

[ tglx: Moved the struct out of the function call argument ]

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Link: https://lore.kernel.org/all/20250513172819.2216709-8-maz@kernel.org

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