/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nvidia,tegra20-pinmux.yaml | 35 enum: [ ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1, 102 atb { 103 nvidia,pins = "atb", "gma", "gme";
|
/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20-trimslice.dts | 49 atb { 50 nvidia,pins = "atb", "gma"; 212 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
|
H A D | tegra20-tamonten.dtsi | 42 atb { 43 nvidia,pins = "atb", "gma", "gme"; 185 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
|
H A D | tegra20-paz00.dts | 64 atb { 65 nvidia,pins = "atb", "gma", "gme"; 201 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
|
H A D | tegra20-ventana.dts | 58 atb { 59 nvidia,pins = "atb", "gma", "gme"; 208 nvidia,pins = "ata", "atb", "atc", "atd",
|
H A D | tegra20-harmony.dts | 56 atb { 57 nvidia,pins = "atb", "gma", "gme"; 203 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
|
H A D | tegra20-seaboard.dts | 56 atb { 57 nvidia,pins = "atb", "gma", "gme"; 206 nvidia,pins = "ata", "atb", "atc", "atd",
|
H A D | tegra20-acer-a500-picasso.dts | 99 atb { 100 nvidia,pins = "atb", "gma", "gme"; 249 nvidia,pins = "ata", "atb", "atc", "atd",
|
H A D | tegra20-colibri.dtsi | 229 nvidia,pins = "atb", "gma";
|
/linux/arch/powerpc/boot/dts/fsl/ |
H A D | e500v1_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
|
H A D | e500v2_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
|
H A D | e500mc_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
|
H A D | e5500_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
|
H A D | e6500_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
|
/linux/drivers/clk/ |
H A D | clk-npcm8xx.c | 365 hw = devm_clk_hw_register_fixed_factor(dev, "atb", "axi", 0, 1, 2); in npcm8xx_clk_probe() 367 return dev_err_probe(dev, PTR_ERR(hw), "Can't register atb div2\n"); in npcm8xx_clk_probe()
|
/linux/kernel/rcu/ |
H A D | tree_stall.h | 893 bool atb = false; in rcu_check_boost_fail() local 904 atb = true; in rcu_check_boost_fail() 911 atb = true; in rcu_check_boost_fail() 928 return atb; in rcu_check_boost_fail()
|
/linux/drivers/clk/samsung/ |
H A D | clk-cpu.c | 245 * In Exynos4210, ATB clock parent is also mout_core. So in exynos_cpuclk_pre_rate_change() 246 * ATB clock also needs to be maintained at safe speed. in exynos_cpuclk_pre_rate_change()
|
H A D | clk-exynos4.c | 1197 #define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \ argument 1198 (((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
|
/linux/arch/xtensa/variants/csp/include/variant/ |
H A D | core.h | 540 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
|
/linux/arch/xtensa/variants/test_kc705_be/include/variant/ |
H A D | core.h | 540 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
|
/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
H A D | core.h | 497 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
|
/linux/arch/xtensa/variants/de212/include/variant/ |
H A D | core.h | 561 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
|
/linux/drivers/soc/samsung/ |
H A D | exynos5420-pmu.c | 238 * If L2_COMMON is turned off, clocks related to ATB async in exynos5420_pmu_init()
|
/linux/drivers/clk/mediatek/ |
H A D | clk-mt8196-topckgen.c | 672 MUX_CLR_SET_UPD(CLK_TOP_ATB, "atb",
|
/linux/drivers/gpu/drm/msm/adreno/ |
H A D | a5xx_gpu.c | 1212 dev_err_ratelimited(gpu->dev->dev, "RBBM | ATB ASYNC overflow\n"); in a5xx_rbbm_err_irq() 1215 dev_err_ratelimited(gpu->dev->dev, "RBBM | ATB bus overflow\n"); in a5xx_rbbm_err_irq()
|