| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | nvidia,tegra20-pinmux.yaml | 35 enum: [ ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1,
102 atb {
103 nvidia,pins = "atb", "gma", "gme";
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| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-tnoc.c | 23 /* Enable generation of output ATB traffic.*/
25 /* Sets the type of issued ATB FLAG packets.*/
27 /* Sets the type of issued ATB FREQ packet*/
69 * - Enable generation of output ATB traffic in trace_noc_enable_hw()
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| H A D | coresight-replicator.c | 163 /* disable the flow of ATB data through port */ in dynamic_replicator_disable()
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| H A D | coresight-stm.c | 166 /* ATB trigger enable on direct writes to TRIG locations */ in stm_port_enable_hw()
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra20-trimslice.dts | 49 atb {
50 nvidia,pins = "atb", "gma";
212 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
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| H A D | tegra20-tamonten.dtsi | 42 atb {
43 nvidia,pins = "atb", "gma", "gme";
185 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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| H A D | tegra20-ventana.dts | 58 atb {
59 nvidia,pins = "atb", "gma", "gme";
208 nvidia,pins = "ata", "atb", "atc", "atd",
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| H A D | tegra20-harmony.dts | 56 atb {
57 nvidia,pins = "atb", "gma", "gme";
203 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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| H A D | tegra20-seaboard.dts | 56 atb {
57 nvidia,pins = "atb", "gma", "gme";
206 nvidia,pins = "ata", "atb", "atc", "atd",
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| H A D | tegra20-acer-a500-picasso.dts | 99 atb {
100 nvidia,pins = "atb", "gma", "gme";
249 nvidia,pins = "ata", "atb", "atc", "atd",
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| H A D | tegra20-colibri.dtsi | 229 nvidia,pins = "atb", "gma";
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | e500v1_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
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| H A D | e500v2_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
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| H A D | e500mc_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
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| H A D | e5500_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
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| H A D | e6500_power_isa.dtsi | 40 power-isa-atb; // Alternate Time Base
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| /linux/drivers/clk/ |
| H A D | clk-npcm8xx.c | 365 hw = devm_clk_hw_register_fixed_factor(dev, "atb", "axi", 0, 1, 2); in npcm8xx_clk_probe()
367 return dev_err_probe(dev, PTR_ERR(hw), "Can't register atb div2\n"); in npcm8xx_clk_probe()
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| /linux/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 245 * In Exynos4210, ATB clock parent is also mout_core. So in exynos_cpuclk_pre_rate_change()
246 * ATB clock also needs to be maintained at safe speed. in exynos_cpuclk_pre_rate_change()
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| /linux/arch/xtensa/variants/csp/include/variant/ |
| H A D | core.h | 540 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
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| /linux/arch/xtensa/variants/test_kc705_be/include/variant/ |
| H A D | core.h | 540 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
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| /linux/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| H A D | core.h | 497 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
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| /linux/arch/xtensa/variants/de212/include/variant/ |
| H A D | core.h | 561 #define XCHAL_TRAX_ATB_WIDTH 0 /* ATB width (bits), 0=no ATB */
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| /linux/drivers/soc/samsung/ |
| H A D | exynos5420-pmu.c | 238 * If L2_COMMON is turned off, clocks related to ATB async in exynos5420_pmu_init()
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a8xx_gpu.c | 1239 dev_err_ratelimited(&gpu->pdev->dev, "RBBM | ATB ASYNC overflow\n"); in a8xx_irq()
1242 dev_err_ratelimited(&gpu->pdev->dev, "RBBM | ATB bus overflow\n"); in a8xx_irq()
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8196-topckgen.c | 672 MUX_CLR_SET_UPD(CLK_TOP_ATB, "atb",
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