xref: /linux/arch/arm/boot/dts/nvidia/tegra20-ventana.dts (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include <dt-bindings/thermal/thermal.h>
6#include "tegra20.dtsi"
7#include "tegra20-cpu-opp.dtsi"
8#include "tegra20-cpu-opp-microvolt.dtsi"
9
10/ {
11	model = "NVIDIA Tegra20 Ventana evaluation board";
12	compatible = "nvidia,ventana", "nvidia,tegra20";
13
14	aliases {
15		rtc0 = "/i2c@7000d000/tps6586x@34";
16		rtc1 = "/rtc@7000e000";
17		serial0 = &uartd;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	memory@0 {
25		reg = <0x00000000 0x40000000>;
26	};
27
28	host1x@50000000 {
29		dc@54200000 {
30			rgb {
31				status = "okay";
32
33				nvidia,panel = <&panel>;
34			};
35		};
36
37		hdmi@54280000 {
38			status = "okay";
39
40			vdd-supply = <&hdmi_vdd_reg>;
41			pll-supply = <&hdmi_pll_reg>;
42
43			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
44			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
45				GPIO_ACTIVE_HIGH>;
46		};
47	};
48
49	pinmux@70000014 {
50		pinctrl-names = "default";
51		pinctrl-0 = <&state_default>;
52
53		state_default: pinmux {
54			ata {
55				nvidia,pins = "ata";
56				nvidia,function = "ide";
57			};
58			atb {
59				nvidia,pins = "atb", "gma", "gme";
60				nvidia,function = "sdio4";
61			};
62			atc {
63				nvidia,pins = "atc";
64				nvidia,function = "nand";
65			};
66			atd {
67				nvidia,pins = "atd", "ate", "gmb", "spia",
68					"spib", "spic";
69				nvidia,function = "gmi";
70			};
71			cdev1 {
72				nvidia,pins = "cdev1";
73				nvidia,function = "plla_out";
74			};
75			cdev2 {
76				nvidia,pins = "cdev2";
77				nvidia,function = "pllp_out4";
78			};
79			crtp {
80				nvidia,pins = "crtp", "lm1";
81				nvidia,function = "crt";
82			};
83			csus {
84				nvidia,pins = "csus";
85				nvidia,function = "vi_sensor_clk";
86			};
87			dap1 {
88				nvidia,pins = "dap1";
89				nvidia,function = "dap1";
90			};
91			dap2 {
92				nvidia,pins = "dap2";
93				nvidia,function = "dap2";
94			};
95			dap3 {
96				nvidia,pins = "dap3";
97				nvidia,function = "dap3";
98			};
99			dap4 {
100				nvidia,pins = "dap4";
101				nvidia,function = "dap4";
102			};
103			dta {
104				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
105				nvidia,function = "vi";
106			};
107			dtf {
108				nvidia,pins = "dtf";
109				nvidia,function = "i2c3";
110			};
111			gmc {
112				nvidia,pins = "gmc";
113				nvidia,function = "uartd";
114			};
115			gmd {
116				nvidia,pins = "gmd";
117				nvidia,function = "sflash";
118			};
119			gpu {
120				nvidia,pins = "gpu";
121				nvidia,function = "pwm";
122			};
123			gpu7 {
124				nvidia,pins = "gpu7";
125				nvidia,function = "rtck";
126			};
127			gpv {
128				nvidia,pins = "gpv", "slxa", "slxk";
129				nvidia,function = "pcie";
130			};
131			hdint {
132				nvidia,pins = "hdint";
133				nvidia,function = "hdmi";
134			};
135			i2cp {
136				nvidia,pins = "i2cp";
137				nvidia,function = "i2cp";
138			};
139			irrx {
140				nvidia,pins = "irrx", "irtx";
141				nvidia,function = "uartb";
142			};
143			kbca {
144				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
145					"kbce", "kbcf";
146				nvidia,function = "kbc";
147			};
148			lcsn {
149				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
150					"lsdi", "lvp0";
151				nvidia,function = "rsvd4";
152			};
153			ld0 {
154				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
155					"ld5", "ld6", "ld7", "ld8", "ld9",
156					"ld10", "ld11", "ld12", "ld13", "ld14",
157					"ld15", "ld16", "ld17", "ldi", "lhp0",
158					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
159					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
160					"lspi", "lvp1", "lvs";
161				nvidia,function = "displaya";
162			};
163			owc {
164				nvidia,pins = "owc", "spdi", "spdo", "uac";
165				nvidia,function = "rsvd2";
166			};
167			pmc {
168				nvidia,pins = "pmc";
169				nvidia,function = "pwr_on";
170			};
171			rm {
172				nvidia,pins = "rm";
173				nvidia,function = "i2c1";
174			};
175			sdb {
176				nvidia,pins = "sdb", "sdc", "sdd", "slxc";
177				nvidia,function = "sdio3";
178			};
179			sdio1 {
180				nvidia,pins = "sdio1";
181				nvidia,function = "sdio1";
182			};
183			slxd {
184				nvidia,pins = "slxd";
185				nvidia,function = "spdif";
186			};
187			spid {
188				nvidia,pins = "spid", "spie", "spif";
189				nvidia,function = "spi1";
190			};
191			spig {
192				nvidia,pins = "spig", "spih";
193				nvidia,function = "spi2_alt";
194			};
195			uaa {
196				nvidia,pins = "uaa", "uab", "uda";
197				nvidia,function = "ulpi";
198			};
199			uad {
200				nvidia,pins = "uad";
201				nvidia,function = "irda";
202			};
203			uca {
204				nvidia,pins = "uca", "ucb";
205				nvidia,function = "uartc";
206			};
207			conf_ata {
208				nvidia,pins = "ata", "atb", "atc", "atd",
209					"cdev1", "cdev2", "dap1", "dap2",
210					"dap4", "ddc", "dtf", "gma", "gmc",
211					"gme", "gpu", "gpu7", "i2cp", "irrx",
212					"irtx", "pta", "rm", "sdc", "sdd",
213					"slxc", "slxd", "slxk", "spdi", "spdo",
214					"uac", "uad", "uca", "ucb", "uda";
215				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217			};
218			conf_ate {
219				nvidia,pins = "ate", "csus", "dap3", "gmd",
220					"gpv", "owc", "spia", "spib", "spic",
221					"spid", "spie", "spig";
222				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223				nvidia,tristate = <TEGRA_PIN_ENABLE>;
224			};
225			conf_ck32 {
226				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
227					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
228				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229			};
230			conf_crtp {
231				nvidia,pins = "crtp", "gmb", "slxa", "spih";
232				nvidia,pull = <TEGRA_PIN_PULL_UP>;
233				nvidia,tristate = <TEGRA_PIN_ENABLE>;
234			};
235			conf_dta {
236				nvidia,pins = "dta", "dtb", "dtc", "dtd";
237				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
238				nvidia,tristate = <TEGRA_PIN_DISABLE>;
239			};
240			conf_dte {
241				nvidia,pins = "dte", "spif";
242				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
243				nvidia,tristate = <TEGRA_PIN_ENABLE>;
244			};
245			conf_hdint {
246				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
247					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
248				nvidia,tristate = <TEGRA_PIN_ENABLE>;
249			};
250			conf_kbca {
251				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
252					"kbce", "kbcf", "sdio1", "uaa", "uab";
253				nvidia,pull = <TEGRA_PIN_PULL_UP>;
254				nvidia,tristate = <TEGRA_PIN_DISABLE>;
255			};
256			conf_lc {
257				nvidia,pins = "lc", "ls";
258				nvidia,pull = <TEGRA_PIN_PULL_UP>;
259			};
260			conf_ld0 {
261				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
262					"ld5", "ld6", "ld7", "ld8", "ld9",
263					"ld10", "ld11", "ld12", "ld13", "ld14",
264					"ld15", "ld16", "ld17", "ldi", "lhp0",
265					"lhp1", "lhp2", "lhs", "lm0", "lpp",
266					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
267					"lvp1", "lvs", "pmc", "sdb";
268				nvidia,tristate = <TEGRA_PIN_DISABLE>;
269			};
270			conf_ld17_0 {
271				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
272					"ld23_22";
273				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
274			};
275			drive_sdio1 {
276				nvidia,pins = "drive_sdio1";
277				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
278				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
279				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
280				nvidia,pull-down-strength = <31>;
281				nvidia,pull-up-strength = <31>;
282				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
283				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284			};
285		};
286
287		state_i2cmux_ddc: pinmux-i2cmux-ddc {
288			ddc {
289				nvidia,pins = "ddc";
290				nvidia,function = "i2c2";
291			};
292			pta {
293				nvidia,pins = "pta";
294				nvidia,function = "rsvd4";
295			};
296		};
297
298		state_i2cmux_idle: pinmux-i2cmux-idle {
299			ddc {
300				nvidia,pins = "ddc";
301				nvidia,function = "rsvd4";
302			};
303			pta {
304				nvidia,pins = "pta";
305				nvidia,function = "rsvd4";
306			};
307		};
308
309		state_i2cmux_pta: pinmux-i2cmux-pta {
310			ddc {
311				nvidia,pins = "ddc";
312				nvidia,function = "rsvd4";
313			};
314			pta {
315				nvidia,pins = "pta";
316				nvidia,function = "i2c2";
317			};
318		};
319	};
320
321	i2s@70002800 {
322		status = "okay";
323	};
324
325	serial@70006300 {
326		/delete-property/ dmas;
327		/delete-property/ dma-names;
328		status = "okay";
329	};
330
331	pwm: pwm@7000a000 {
332		status = "okay";
333	};
334
335	i2c@7000c000 {
336		status = "okay";
337		clock-frequency = <400000>;
338
339		wm8903: wm8903@1a {
340			compatible = "wlf,wm8903";
341			reg = <0x1a>;
342			interrupt-parent = <&gpio>;
343			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
344
345			gpio-controller;
346			#gpio-cells = <2>;
347
348			micdet-cfg = <0>;
349			micdet-delay = <100>;
350			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
351		};
352
353		/* ALS and proximity sensor */
354		isl29018@44 {
355			compatible = "isil,isl29018";
356			reg = <0x44>;
357			interrupt-parent = <&gpio>;
358			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
359		};
360	};
361
362	i2c@7000c400 {
363		status = "okay";
364		clock-frequency = <100000>;
365	};
366
367	i2c@7000c500 {
368		status = "okay";
369		clock-frequency = <400000>;
370	};
371
372	i2c@7000d000 {
373		status = "okay";
374		clock-frequency = <400000>;
375
376		pmic: tps6586x@34 {
377			compatible = "ti,tps6586x";
378			reg = <0x34>;
379			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
380
381			ti,system-power-controller;
382
383			#gpio-cells = <2>;
384			gpio-controller;
385
386			sys-supply = <&vdd_5v0_reg>;
387			vin-sm0-supply = <&sys_reg>;
388			vin-sm1-supply = <&sys_reg>;
389			vin-sm2-supply = <&sys_reg>;
390			vinldo01-supply = <&sm2_reg>;
391			vinldo23-supply = <&sm2_reg>;
392			vinldo4-supply = <&sm2_reg>;
393			vinldo678-supply = <&sm2_reg>;
394			vinldo9-supply = <&sm2_reg>;
395
396			regulators {
397				sys_reg: sys {
398					regulator-name = "vdd_sys";
399					regulator-always-on;
400				};
401
402				vdd_core: sm0 {
403					regulator-name = "vdd_sm0,vdd_core";
404					regulator-min-microvolt = <950000>;
405					regulator-max-microvolt = <1300000>;
406					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
407					regulator-coupled-max-spread = <170000 550000>;
408					regulator-always-on;
409					regulator-boot-on;
410
411					nvidia,tegra-core-regulator;
412				};
413
414				vdd_cpu: sm1 {
415					regulator-name = "vdd_sm1,vdd_cpu";
416					regulator-min-microvolt = <750000>;
417					regulator-max-microvolt = <1125000>;
418					regulator-coupled-with = <&vdd_core &rtc_vdd>;
419					regulator-coupled-max-spread = <550000 550000>;
420					regulator-always-on;
421					regulator-boot-on;
422
423					nvidia,tegra-cpu-regulator;
424				};
425
426				sm2_reg: sm2 {
427					regulator-name = "vdd_sm2,vin_ldo*";
428					regulator-min-microvolt = <3700000>;
429					regulator-max-microvolt = <3700000>;
430					regulator-always-on;
431				};
432
433				/* LDO0 is not connected to anything */
434
435				ldo1 {
436					regulator-name = "vdd_ldo1,avdd_pll*";
437					regulator-min-microvolt = <1100000>;
438					regulator-max-microvolt = <1100000>;
439					regulator-always-on;
440				};
441
442				rtc_vdd: ldo2 {
443					regulator-name = "vdd_ldo2,vdd_rtc";
444					regulator-min-microvolt = <950000>;
445					regulator-max-microvolt = <1300000>;
446					regulator-coupled-with = <&vdd_core &vdd_cpu>;
447					regulator-coupled-max-spread = <170000 550000>;
448					regulator-always-on;
449					regulator-boot-on;
450
451					nvidia,tegra-rtc-regulator;
452				};
453
454				ldo3 {
455					regulator-name = "vdd_ldo3,avdd_usb*";
456					regulator-min-microvolt = <3300000>;
457					regulator-max-microvolt = <3300000>;
458					regulator-always-on;
459				};
460
461				ldo4 {
462					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
463					regulator-min-microvolt = <1800000>;
464					regulator-max-microvolt = <1800000>;
465					regulator-always-on;
466				};
467
468				ldo5 {
469					regulator-name = "vdd_ldo5,vcore_mmc";
470					regulator-min-microvolt = <2850000>;
471					regulator-max-microvolt = <2850000>;
472					regulator-always-on;
473				};
474
475				ldo6 {
476					regulator-name = "vdd_ldo6,avdd_vdac";
477					regulator-min-microvolt = <1800000>;
478					regulator-max-microvolt = <1800000>;
479				};
480
481				hdmi_vdd_reg: ldo7 {
482					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
483					regulator-min-microvolt = <3300000>;
484					regulator-max-microvolt = <3300000>;
485				};
486
487				hdmi_pll_reg: ldo8 {
488					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
489					regulator-min-microvolt = <1800000>;
490					regulator-max-microvolt = <1800000>;
491				};
492
493				ldo9 {
494					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
495					regulator-min-microvolt = <2850000>;
496					regulator-max-microvolt = <2850000>;
497					regulator-always-on;
498				};
499
500				ldo_rtc {
501					regulator-name = "vdd_rtc_out,vdd_cell";
502					regulator-min-microvolt = <3300000>;
503					regulator-max-microvolt = <3300000>;
504					regulator-always-on;
505				};
506			};
507		};
508
509		nct1008: temperature-sensor@4c {
510			compatible = "onnn,nct1008";
511			reg = <0x4c>;
512			#thermal-sensor-cells = <1>;
513		};
514	};
515
516	pmc@7000e400 {
517		nvidia,invert-interrupt;
518		nvidia,suspend-mode = <1>;
519		nvidia,cpu-pwr-good-time = <2000>;
520		nvidia,cpu-pwr-off-time = <100>;
521		nvidia,core-pwr-good-time = <3845 3845>;
522		nvidia,core-pwr-off-time = <458>;
523		nvidia,sys-clock-req-active-high;
524		core-supply = <&vdd_core>;
525	};
526
527	usb@c5000000 {
528		status = "okay";
529	};
530
531	usb-phy@c5000000 {
532		status = "okay";
533	};
534
535	usb@c5004000 {
536		status = "okay";
537	};
538
539	usb-phy@c5004000 {
540		status = "okay";
541		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
542			GPIO_ACTIVE_LOW>;
543	};
544
545	usb@c5008000 {
546		status = "okay";
547	};
548
549	usb-phy@c5008000 {
550		status = "okay";
551	};
552
553	mmc@c8000000 {
554		status = "okay";
555		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
556		bus-width = <4>;
557		keep-power-in-suspend;
558	};
559
560	mmc@c8000400 {
561		status = "okay";
562		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
563		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
564		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
565		bus-width = <4>;
566	};
567
568	mmc@c8000600 {
569		status = "okay";
570		bus-width = <8>;
571		non-removable;
572	};
573
574	backlight: backlight {
575		compatible = "pwm-backlight";
576
577		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
578		power-supply = <&vdd_bl_reg>;
579		pwms = <&pwm 2 5000000>;
580
581		brightness-levels = <0 4 8 16 32 64 128 255>;
582		default-brightness-level = <6>;
583	};
584
585	clk32k_in: clock-32k {
586		compatible = "fixed-clock";
587		clock-frequency = <32768>;
588		#clock-cells = <0>;
589	};
590
591	cpus {
592		cpu0: cpu@0 {
593			cpu-supply = <&vdd_cpu>;
594			operating-points-v2 = <&cpu0_opp_table>;
595			#cooling-cells = <2>;
596		};
597
598		cpu1: cpu@1 {
599			cpu-supply = <&vdd_cpu>;
600			operating-points-v2 = <&cpu0_opp_table>;
601			#cooling-cells = <2>;
602		};
603	};
604
605	gpio-keys {
606		compatible = "gpio-keys";
607
608		key-power {
609			label = "Power";
610			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
611			linux,code = <KEY_POWER>;
612			wakeup-source;
613		};
614	};
615
616	i2cmux {
617		compatible = "i2c-mux-pinctrl";
618		#address-cells = <1>;
619		#size-cells = <0>;
620
621		i2c-parent = <&{/i2c@7000c400}>;
622
623		pinctrl-names = "ddc", "pta", "idle";
624		pinctrl-0 = <&state_i2cmux_ddc>;
625		pinctrl-1 = <&state_i2cmux_pta>;
626		pinctrl-2 = <&state_i2cmux_idle>;
627
628		hdmi_ddc: i2c@0 {
629			reg = <0>;
630			#address-cells = <1>;
631			#size-cells = <0>;
632		};
633
634		lvds_ddc: i2c@1 {
635			reg = <1>;
636			#address-cells = <1>;
637			#size-cells = <0>;
638		};
639	};
640
641	panel: panel {
642		compatible = "chunghwa,claa101wa01a";
643
644		power-supply = <&vdd_pnl_reg>;
645		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
646
647		backlight = <&backlight>;
648		ddc-i2c-bus = <&lvds_ddc>;
649	};
650
651	vdd_5v0_reg: regulator-5v0 {
652		compatible = "regulator-fixed";
653		regulator-name = "vdd_5v0";
654		regulator-min-microvolt = <5000000>;
655		regulator-max-microvolt = <5000000>;
656		regulator-always-on;
657	};
658
659	regulator-1v5 {
660		compatible = "regulator-fixed";
661		regulator-name = "vdd_1v5";
662		regulator-min-microvolt = <1500000>;
663		regulator-max-microvolt = <1500000>;
664		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
665	};
666
667	regulator-1v2 {
668		compatible = "regulator-fixed";
669		regulator-name = "vdd_1v2";
670		regulator-min-microvolt = <1200000>;
671		regulator-max-microvolt = <1200000>;
672		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
673		enable-active-high;
674	};
675
676	vdd_pnl_reg: regulator-pnl {
677		compatible = "regulator-fixed";
678		regulator-name = "vdd_pnl";
679		regulator-min-microvolt = <2800000>;
680		regulator-max-microvolt = <2800000>;
681		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
682		enable-active-high;
683	};
684
685	vdd_bl_reg: regulator-bl {
686		compatible = "regulator-fixed";
687		regulator-name = "vdd_bl";
688		regulator-min-microvolt = <2800000>;
689		regulator-max-microvolt = <2800000>;
690		gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
691		enable-active-high;
692	};
693
694	sound {
695		compatible = "nvidia,tegra-audio-wm8903-ventana",
696			     "nvidia,tegra-audio-wm8903";
697		nvidia,model = "NVIDIA Tegra Ventana";
698
699		nvidia,audio-routing =
700			"Headphone Jack", "HPOUTR",
701			"Headphone Jack", "HPOUTL",
702			"Int Spk", "ROP",
703			"Int Spk", "RON",
704			"Int Spk", "LOP",
705			"Int Spk", "LON",
706			"Mic Jack", "MICBIAS",
707			"IN1L", "Mic Jack";
708
709		nvidia,i2s-controller = <&tegra_i2s1>;
710		nvidia,audio-codec = <&wm8903>;
711
712		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
713		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
714		nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
715			GPIO_ACTIVE_HIGH>;
716		nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
717			GPIO_ACTIVE_HIGH>;
718
719		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
720			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
721			 <&tegra_car TEGRA20_CLK_CDEV1>;
722		clock-names = "pll_a", "pll_a_out0", "mclk";
723	};
724
725	thermal-zones {
726		cpu-thermal {
727			polling-delay-passive = <1000>; /* milliseconds */
728			polling-delay = <5000>; /* milliseconds */
729
730			thermal-sensors = <&nct1008 1>;
731
732			trips {
733				trip0: cpu-alert0 {
734					/* start throttling at 50C */
735					temperature = <50000>;
736					hysteresis = <200>;
737					type = "passive";
738				};
739
740				trip1: cpu-crit {
741					/* shut down at 60C */
742					temperature = <60000>;
743					hysteresis = <2000>;
744					type = "critical";
745				};
746			};
747
748			cooling-maps {
749				map0 {
750					trip = <&trip0>;
751					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
752							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
753				};
754			};
755		};
756	};
757};
758