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/freebsd/tools/tools/nanobsd/
H A DFlashDevice.sub45 256|256mb)
59 256|256mb)
73 64|64mb)
87 512|512mb)
110 32|32mb)
115 64|64mb)
120 128|128mb)
125 256|256mb)
130 512|512mb)
135 1024|1024mb|1g)
[all …]
/freebsd/tools/tools/crypto/
H A DREADME18 0.129 sec, 2048 des crypts, 8 bytes, 127120 byte/sec, 1.0 Mb/sec
19 0.129 sec, 2048 des crypts, 16 bytes, 253915 byte/sec, 1.9 Mb/sec
20 0.129 sec, 2048 des crypts, 32 bytes, 508942 byte/sec, 3.9 Mb/sec
21 0.128 sec, 2048 des crypts, 64 bytes, 1020135 byte/sec, 7.8 Mb/sec
22 0.134 sec, 2048 des crypts, 128 bytes, 1954869 byte/sec, 14.9 Mb/sec
23 0.142 sec, 2048 des crypts, 256 bytes, 3698107 byte/sec, 28.2 Mb/sec
24 0.190 sec, 2048 des crypts, 1024 bytes, 11037700 byte/sec, 84.2 Mb/sec
25 0.264 sec, 2048 des crypts, 2048 bytes, 15891127 byte/sec, 121.2 Mb/sec
26 0.403 sec, 2048 des crypts, 4096 bytes, 20828998 byte/sec, 158.9 Mb/sec
27 0.687 sec, 2048 des crypts, 8192 bytes, 24426602 byte/sec, 186.4 Mb/sec
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dfaraday,ftpci100.txt29 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
30 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
51 "dual" variant has 64MiB. Take this into account when describing the ranges.
106 /* 64MiB at 0x00000000-0x03ffffff */
108 /* 64MiB at 0x00000000-0x03ffffff */
H A Dfaraday,ftpci100.yaml22 "dual" variant has 64MiB. Take this into account when describing the ranges.
84 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
85 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
144 /* 64MiB at 0x00000000-0x03ffffff */
146 /* 64MiB at 0x00000000-0x03ffffff */
H A Dv3-v360epc-pci.txt10 first the base address of the V3 host bridge controller, 64KB
11 second the configuration area register space, 16MB
18 each be exactly 256MB (0x10000000) in size.
22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB,
23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked
50 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
H A Dintel,ixp4xx-pci.yaml38 description: Typically one memory range of 64MB and one IO
39 space range of 64KB.
44 the RAM is at. It can map only 64MB so if the RAM is bigger
45 than 64MB the DMA access has to be restricted to these
/freebsd/sys/dts/arm/
H A Dannapurna-alpine.dts47 d-cache-line-size = <64>; // 64 bytes
48 i-cache-line-size = <64>; // 64 bytes
60 d-cache-line-size = <64>; // 64 bytes
61 i-cache-line-size = <64>; // 64 bytes
73 d-cache-line-size = <64>; // 64 bytes
74 i-cache-line-size = <64>; // 64 bytes
86 d-cache-line-size = <64>; // 64 bytes
87 i-cache-line-size = <64>; // 64 bytes
98 reg = <0x00100000 0x7ff00000>; // 2047MB at 1MB
226 // - ECAM - non prefetchable config space: 2MB
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dsbc8548-altflash.dts5 * Configured for booting off the alternate (64MB SODIMM) flash.
26 ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
27 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
28 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
30 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
H A Dsbc8548.dts23 ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
24 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
25 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
27 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dsbc8641d.dts26 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
27 1 0 0xf0000000 0x00010000 // 64KB EEPROM
28 2 0 0xf1000000 0x00100000 // EPLD (1MB)
29 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
30 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
31 6 0 0xf4000000 0x00100000 // LCD display (1MB)
32 7 0 0xe8000000 0x04000000>; // 64MB OneNAND
/freebsd/sys/x86/x86/
H A Didentcpu.c834 "\003DTES64" /* 64-bit Debug Trace */ in printcpuinfo()
899 "\036LM" /* 64 bit long mode */ in printcpuinfo()
1834 printf("L1 2MB data TLB: %d entries", (regs[0] >> 16) & 0xff); in print_AMD_info()
1837 printf("L1 2MB instruction TLB: %d entries", regs[0] & 0xff); in print_AMD_info()
1860 printf("L2 2MB data TLB: %d entries", in print_AMD_info()
1863 printf("L2 2MB instruction TLB: %d entries", in print_AMD_info()
1867 printf("L2 2MB unified TLB: %d entries", in print_AMD_info()
1987 printf("Instruction TLB: 4 MB pages, fully associative, 2 entries\n"); in print_INTEL_TLB()
1990 printf("Data TLB: 4 KB pages, 4-way set associative, 64 entries\n"); in print_INTEL_TLB()
1993 printf("Data TLB: 4 MB Pages, 4-way set associative, 8 entries\n"); in print_INTEL_TLB()
[all …]
/freebsd/sys/riscv/include/
H A Dvmparam.h69 #define VM_PHYSSEG_MAX 64
89 * An allocation size of 16MB is supported in order to optimize the
91 * at most four TTEs, collectively mapping 16MB of physical memory.
92 * By reducing the number of distinct 16MB "pages" that are used by UMA,
93 * the physical memory allocator reduces the likelihood of both 4MB
94 * page TLB misses and cache misses caused by 4MB page TLB misses.
119 * four-level page tables. 64-bit RISC-V implementations are required to provide
123 * The address space is split into two regions at each end of the 64-bit address
134 * 0xfffffff000000000 - 0xffffffffffffffff 64GB unused
143 * 0xfffffff000000000 - 0xffffffffffffffff 64GB unused
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2-xmc.dts90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
114 reg = <0x04000000 0x06400000>; /* 100MB */
119 reg = <0x0a400000 0x35c00000>; /* 860MB */
169 reg = <0x001e0000 0x00010000>;/* 64KB */
174 reg = <0x001f0000 0x00010000>; /* 64KB */
179 reg = <0x00200000 0x00e00000>; /* 14MB */
184 reg = <0x01000000 0x01000000>; /* 16MB */
/freebsd/sys/arm64/include/
H A Dvmparam.h73 #define VM_PHYSSEG_MAX 64
97 * When PAGE_SIZE is 4KB, an allocation size of 16MB is supported in order
98 * to optimize the use of the direct map by UMA. Specifically, a 64-byte
99 * cache line contains at most 8 L2 BLOCK entries, collectively mapping 16MB
100 * of physical memory. By reducing the number of distinct 16MB "pages" that
102 * both 2MB page TLB misses and cache misses during the page table walk when
103 * a 2MB page TLB miss does occur.
105 * When PAGE_SIZE is 16KB, an allocation size of 32MB is supported. This
125 * pages when PAGE_SIZE is 16KB. Level 1 reservations consist of 32 64KB
150 * split into 2 regions at each end of the 64 bit address space, with an
[all …]
/freebsd/usr.sbin/fstyp/
H A Dhammer2_disk.h44 * dmsg_hdr must be 64 bytes
76 * are always 64KB. Logical file buffers are typically 16KB. All data
77 * references utilize 64-bit byte offsets.
89 * For the moment the maximum allocation size is HAMMER2_PBUFSIZE (64K),
91 * fragments might be supported in the future (down to 64 bytes is possible),
94 * A full indirect block use supports 512 x 128-byte blockrefs in a 64KB
98 * A maximally sized file (2^64-1 bytes) requires ~6 indirect block levels
99 * using 64KB indirect blocks (128 byte refs, 512 or radix 9 per indblk).
111 #define HAMMER2_RADIX_KEY 64 /* number of bits in key */
128 * HAMMER2_SEGSIZE - Allocation map segment size, typically 4MB
[all...]
/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp4xx.dtsi18 * The IXP4xx expansion bus is a set of up to 7 each up to 16MB
19 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
64 * 64MB 32bit non-prefetchable memory 0x48000000-0x4bffffff
65 * done in 4 chunks of 16MB each.
68 /* 64KB I/O space at 0x4c000000 */
74 * using 4 1:1 16MB windows, so the RAM should not be more than
75 * 64 MB for this to work. If your memory is anywhere else
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Duncore-memory.json8 "ScaleUnit": "64Bytes",
18 "ScaleUnit": "64Bytes",
28 "ScaleUnit": "64Bytes",
38 "ScaleUnit": "64Bytes",
104 …"BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec). Derived from unc_m…
109 "ScaleUnit": "6.103515625E-5MB/sec",
113 "BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec)",
118 "ScaleUnit": "6.103515625E-5MB/sec",
122 …"BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB/sec). Derived from unc_…
127 "ScaleUnit": "6.103515625E-5MB/sec",
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-sm-k26-revA.dts147 compatible = "jedec,spi-nor"; /* 64MB */
184 reg = <0x200000 0xD00000>; /* 13MB */
194 reg = <0xF80000 0xD00000>; /* 13MB */
204 reg = <0x1D00000 0x100000>; /* 1MB */
208 reg = <0x1E00000 0x200000>; /* 2MB */
214 reg = <0x2000000 0x200000>; /* 2MB */
238 reg = <0x22a0000 0x1d60000>; /* 29.375 MB */
343 "", "", "", "", "", /* 60 - 64 */
467 opp-hz = /bits/ 64 <1333333333>;
470 opp-hz = /bits/ 64 <666666666>;
[all …]
/freebsd/sys/dev/agp/
H A Dagp_amd64.c264 0x02000000, /* 32 MB */
265 0x04000000, /* 64 MB */
266 0x08000000, /* 128 MB */
267 0x10000000, /* 256 MB */
268 0x20000000, /* 512 MB */
269 0x40000000, /* 1024 MB */
270 0x80000000, /* 2048 MB */
402 case 0x02000000: /* 32 MB */ in agp_amd64_uli_set_aperture()
403 case 0x04000000: /* 64 MB */ in agp_amd64_uli_set_aperture()
404 case 0x08000000: /* 128 MB */ in agp_amd64_uli_set_aperture()
[all …]
/freebsd/contrib/ntp/sntp/libevent/cmake/
H A DCheckFileOffsetBits.c4 #define MB ((off_t)1024 * KB) macro
5 #define GB ((off_t)1024 * MB)
7 int t2[(((64 * GB -1) % 671088649) == 268434537)
8 && (((TB - (64 * GB -1) + 255) % 1792151290) == 305159546)? 1: -1];
/freebsd/contrib/libevent/cmake/
H A DCheckFileOffsetBits.c4 #define MB ((off_t)1024 * KB) macro
5 #define GB ((off_t)1024 * MB)
7 int t2[(((64 * GB -1) % 671088649) == 268434537)
8 && (((TB - (64 * GB -1) + 255) % 1792151290) == 305159546)? 1: -1];
/freebsd/sys/dev/mlx4/mlx4_en/
H A Dmlx4_en_rx.c76 struct mbuf *mb; in mlx4_en_alloc_mbuf() local
79 mb = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, ring->rx_mb_size); in mlx4_en_alloc_mbuf()
80 if (likely(mb != NULL)) in mlx4_en_alloc_mbuf()
81 mb->m_pkthdr.len = mb->m_len = ring->rx_mb_size; in mlx4_en_alloc_mbuf()
83 mb = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MLX4_EN_MAX_RX_BYTES); in mlx4_en_alloc_mbuf()
84 if (likely(mb != NULL)) { in mlx4_en_alloc_mbuf()
85 struct mbuf *mb_head = mb; in mlx4_en_alloc_mbuf()
88 mb->m_len = MLX4_EN_MAX_RX_BYTES; in mlx4_en_alloc_mbuf()
89 mb->m_pkthdr.len = MLX4_EN_MAX_RX_BYTES; in mlx4_en_alloc_mbuf()
94 mb = (mb->m_next = m_getjcl(M_NOWAIT, MT_DATA, 0, MLX4_EN_MAX_RX_BYTES)); in mlx4_en_alloc_mbuf()
[all …]
/freebsd/tools/tools/iwi/
H A Diwistats.c56 { 7, "Number of unicast 802.11b frames transmitted at 1Mb/s" },
57 { 8, "Number of unicast 802.11b frames transmitted at 2Mb/s" },
58 { 9, "Number of unicast 802.11b frames transmitted at 5.5Mb/s" },
59 { 10, "Number of unicast 802.11b frames transmitted at 11Mb/s" },
61 { 19, "Number of unicast 802.11g frames transmitted at 1Mb/s" },
62 { 20, "Number of unicast 802.11g frames transmitted at 2Mb/s" },
63 { 21, "Number of unicast 802.11g frames transmitted at 5.5Mb/s" },
64 { 22, "Number of unicast 802.11g frames transmitted at 6Mb/s" },
65 { 23, "Number of unicast 802.11g frames transmitted at 9Mb/s" },
66 { 24, "Number of unicast 802.11g frames transmitted at 11Mb/s" },
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234.dtsi2522 port@64 {
3548 snps,blen = <256 128 64 32>;
3590 snps,blen = <256 128 64 32>;
3632 snps,blen = <256 128 64 32>;
4436 <0x35 0x30000000 0x0 0x10000000>; /* ECAM (256MB) */
4469 …= <0x43000000 0x32 0x40000000 0x32 0x40000000 0x2 0xe8000000>, /* prefetchable memory (11904 MB) */
4470 …<0x02000000 0x0 0x40000000 0x35 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
4471 <0x01000000 0x0 0x2a100000 0x00 0x2a100000 0x0 0x00100000>; /* downstream I/O (1 MB) */
4490 <0x38 0x30000000 0x0 0x10000000>; /* ECAM (256MB) */
4523 …= <0x43000000 0x35 0x40000000 0x35 0x40000000 0x2 0xc0000000>, /* prefetchable memory (11264 MB) */
[all …]
/freebsd/sys/powerpc/include/
H A Dvmparam.h69 #define MAXSSIZ (64*1024*1024) /* max stack size */
156 * logical memory block size of 64MB.
165 * but may not be on 64-bit ones.
190 /* The largest allocation size is 16MB. */
193 /* The largest allocation size is 4MB. */
257 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
259 #define ZERO_REGION_SIZE (64 * 1024) /* 64KB */

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