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/linux/tools/perf/pmu-events/arch/arm64/freescale/imx95/sys/
H A Dmetrics.json5 … imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (…
13 "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
14 "ScaleUnit": "9.765625e-4KB",
21 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
22 "ScaleUnit": "9.765625e-4KB",
29 …\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3fe\\,axi_id\\=0x004@ ) * 32",
30 "ScaleUnit": "9.765625e-4KB",
37 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
38 "ScaleUnit": "9.765625e-4KB",
45 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fe\\,axi_id\\=0x004@ ) * 32",
[all …]
/linux/Documentation/admin-guide/cgroup-v1/
H A Dhugetlb.rst34 For a system supporting three hugepage sizes (64k, 32M and 1G), the control
46 hugetlb.64KB.limit_in_bytes
47 hugetlb.64KB.max_usage_in_bytes
48 hugetlb.64KB.numa_stat
49 hugetlb.64KB.usage_in_bytes
50 hugetlb.64KB.failcnt
51 hugetlb.64KB.rsvd.limit_in_bytes
52 hugetlb.64KB.rsvd.max_usage_in_bytes
53 hugetlb.64KB.rsvd.usage_in_bytes
54 hugetlb.64KB.rsvd.failcnt
[all …]
/linux/arch/parisc/
H A DKconfig191 that can run on all 32-bit PA CPUs (albeit not optimally fast),
273 and slower than the 32bit one.
280 bool "4KB"
284 performance, a page size of 16KB is recommended. For best
285 compatibility with 32bit applications, a page size of 4KB should be
286 selected (the vast majority of 32bit binaries work perfectly fine
289 4KB For best 32bit compatibility
290 16KB For best performance
291 64KB For best performance, might give more overhead.
293 If you don't know what to do, choose 4KB.
[all …]
/linux/drivers/s390/crypto/
H A Dzcrypt_ep11misc.c113 static int ep11_kb_split(const u8 *kb, size_t kblen, u32 kbver, in ep11_kb_split() argument
124 hdr = (struct ep11kblob_header *)kb; in ep11_kb_split()
141 pl = (u8 *)kb + hdrsize; in ep11_kb_split()
157 static int ep11_kb_decode(const u8 *kb, size_t kblen, in ep11_kb_decode() argument
169 tmph = (struct ep11kblob_header *)kb; in ep11_kb_decode()
175 if (ep11_kb_split(kb, kblen, tmph->version, in ep11_kb_decode()
208 struct ep11keyblob *kb; in ep11_kb_wkvp() local
210 if (ep11_kb_decode(keyblob, keybloblen, NULL, NULL, &kb, NULL)) in ep11_kb_wkvp()
212 return kb->wkvp; in ep11_kb_wkvp()
223 struct ep11keyblob *kb = (struct ep11keyblob *)(key + sizeof(*hdr)); in ep11_check_aes_key_with_hdr() local
[all …]
H A Dzcrypt_ccamisc.c361 keysize = 32; in cca_genseckey()
500 keysize = 32; in cca_clr2seckey()
613 u8 keyattr[32]; in cca_sec2protkey()
616 u8 vp[32]; /* verification pattern */ in cca_sec2protkey()
689 case 16 + 32: in cca_sec2protkey()
694 case 24 + 32: in cca_sec2protkey()
699 case 32 + 32: in cca_sec2protkey()
796 } kb; in cca_gencipherkey() member
811 } kb; in cca_gencipherkey() member
847 /* prepare kb block */ in cca_gencipherkey()
[all …]
/linux/arch/powerpc/lib/
H A Dtest-code-patching.c68 /* Largest negative relative branch, - 32 MB */ in test_branch_iform()
87 /* Maximum relative negative offset, - 32 MB */ in test_branch_iform()
92 /* Out of range relative negative offset, - 32 MB + 4*/ in test_branch_iform()
96 /* Out of range relative positive offset, + 32 MB */ in test_branch_iform()
151 /* Maximum positive relative conditional branch, + 32 KB - 4B */ in test_branch_bform()
157 /* Largest negative relative conditional branch, - 32 KB */ in test_branch_bform()
179 /* Maximum relative negative offset, - 32 KB */ in test_branch_bform()
184 /* Out of range relative negative offset, - 32 KB + 4*/ in test_branch_bform()
188 /* Out of range relative positive offset, + 32 KB */ in test_branch_bform()
226 /* Maximum negative case, move b . to addr + 32 MB */ in test_translate_branch()
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/linux/arch/sh/mm/
H A DKconfig47 The page size is not necessarily 4KB. Keep this in mind when
81 def_bool !32BIT
84 config 32BIT
89 bool "Support 32-bit physical addressing through PMB"
91 select 32BIT
95 32-bits through the SH-4A PMB. If this is not set, legacy
165 bool "64kB"
169 bool "256kB"
199 bool "Enable 32KB cache size for SH7705"
/linux/Documentation/arch/arm64/
H A Dmemory.rst9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
12 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
18 only available when running with a 64KB page size and expands the
27 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
33 [ffff600000000000 ffff7fffffffffff] 32TB [kasan shadow region]
44 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
61 Translation table lookup with 4KB pages::
64 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
76 Translation table lookup with 64KB pages::
[all …]
/linux/arch/mips/lib/
H A Ddump_tlb.c49 case PM_4K: return "4kb"; in msk2str()
50 case PM_16K: return "16kb"; in msk2str()
51 case PM_64K: return "64kb"; in msk2str()
52 case PM_256K: return "256kb"; in msk2str()
54 case PM_8K: return "8kb"; in msk2str()
55 case PM_32K: return "32kb"; in msk2str()
56 case PM_128K: return "128kb"; in msk2str()
57 case PM_512K: return "512kb"; in msk2str()
60 case PM_32M: return "32Mb"; in msk2str()
/linux/arch/x86/pci/
H A Dce4100.c39 #define KB (1024) macro
100 DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
101 DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
102 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
103 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
104 DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
105 DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
106 DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
108 DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
109 DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
[all …]
/linux/Documentation/translations/zh_TW/arch/arm64/
H A Dmemory.txt37 頁大小爲 4KB 的 4 級轉換表和頁大小爲 64KB 的 3 級轉換表。
39 AArch64 Linux 使用 3 級或 4 級轉換表,其頁大小配置爲 4KB,對於用戶和內核
49 AArch64 Linux 在頁大小爲 4KB,並使用 3 級轉換表時的內存佈局:
57 AArch64 Linux 在頁大小爲 4KB,並使用 4 級轉換表時的內存佈局:
65 AArch64 Linux 在頁大小爲 64KB,並使用 2 級轉換表時的內存佈局:
73 AArch64 Linux 在頁大小爲 64KB,並使用 3 級轉換表時的內存佈局:
84 4KB 頁大小的轉換表查找:
87 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
99 64KB 頁大小的轉換表查找:
102 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
/linux/Documentation/translations/zh_CN/arch/arm64/
H A Dmemory.txt33 页大小为 4KB 的 4 级转换表和页大小为 64KB 的 3 级转换表。
35 AArch64 Linux 使用 3 级或 4 级转换表,其页大小配置为 4KB,对于用户和内核
45 AArch64 Linux 在页大小为 4KB,并使用 3 级转换表时的内存布局:
53 AArch64 Linux 在页大小为 4KB,并使用 4 级转换表时的内存布局:
61 AArch64 Linux 在页大小为 64KB,并使用 2 级转换表时的内存布局:
69 AArch64 Linux 在页大小为 64KB,并使用 3 级转换表时的内存布局:
80 4KB 页大小的转换表查找:
83 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
95 64KB 页大小的转换表查找:
98 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2.h18 #define MSIX_BAR_SIZE 0x4000ull /* 16KB */
21 #define CFG_SIZE 0x8000000ull /* 96MB CFG + 32MB DBG*/
26 #define STM_FLASH_SIZE 0x2000000ull /* 32MB */
32 #define SCRATCHPAD_SRAM_SIZE 0x10000ull /* 64KB */
35 #define PCIE_FW_SRAM_SIZE 0x8000 /* 32KB */
/linux/arch/loongarch/
H A DKconfig200 config 32BIT
239 def_bool 32BIT
293 default 16KB_2LEVEL if 32BIT
301 bool "4KB with 3 levels"
305 This option selects 4KB page size with 3 level page tables, which
309 bool "4KB with 4 levels"
313 This option selects 4KB page size with 4 level page tables, which
317 bool "16KB with 2 levels"
321 This option selects 16KB page size with 2 level page tables, which
325 bool "16KB with 3 levels"
[all …]
/linux/drivers/accel/habanalabs/include/gaudi/
H A Dgaudi.h19 #define CFG_SIZE 0x4000000 /* 32MB CFG + 32MB DBG*/
27 #define PSOC_SCRATCHPAD_SIZE 0x10000 /* 64KB */
30 #define PCIE_FW_SRAM_SIZE 0x8000 /* 32KB */
37 #define GAUDI_MSI_ENTRIES 32
/linux/Documentation/cdrom/
H A Dpacket-writing.rst49 shall implement "true random writes with 2KB granularity", which means
51 2KB on such a disc. For example, it should be possible to do::
59 host to perform aligned writes at 32KB boundaries. Other drives do
61 writes are not 32KB aligned.
92 device with a 2KB block size, you can put any filesystem you like on
/linux/drivers/w1/slaves/
H A DKconfig82 This EEPROM is organized as one page of 32 bytes for random
86 tristate "1kb EEPROM family support (DS2431)"
89 1kb EEPROM family device (DS2431)
92 tristate "4kb EEPROM family support (DS2433)"
95 4kb EEPROM family device (DS2433).
113 tristate "512b/1kb/16kb EPROM family support"
117 512b/1kb/16kb EPROM family device (DS250x).
151 4kb EEPROM with PIO family device (DS28E04).
/linux/drivers/char/agp/
H A Dintel-gtt.c179 /* i81x does not preallocate the gtt. It's always 64kb in size. */ in i810_setup()
187 intel_private.registers = ioremap(reg_addr, KB(64)); in i810_setup()
344 static const int ddt[4] = { 0, 16, 32, 64 }; in intel_gtt_stolen_size()
357 stolen_size = KB(512); in intel_gtt_stolen_size()
390 stolen_size = MB(32); in intel_gtt_stolen_size()
424 (u64)stolen_size / KB(1), local ? "local" : "stolen"); in intel_gtt_stolen_size()
479 size = KB(128); in i965_gtt_total_entries()
482 size = KB(256); in i965_gtt_total_entries()
485 size = KB(512); in i965_gtt_total_entries()
487 /* GTT pagetable sizes bigger than 512KB are not possible on G33! */ in i965_gtt_total_entries()
[all …]
/linux/tools/testing/selftests/proc/
H A Dproc-pid-vm.c111 #define VADDR (1UL << 32)
118 ((x)>>32)&0xff, ((x)>>40)&0xff, ((x)>>48)&0xff, ((x)>>56)&0xff
123 ((x)>>32)&0xff, ((x)>>40)&0xff, ((x)>>48)&0xff, ((x)>>56)&0xff
391 #define RSS1 "Rss: 4 kB\n" in main()
392 #define RSS2 "Rss: 0 kB\n" in main()
393 #define PSS1 "Pss: 4 kB\n" in main()
394 #define PSS2 "Pss: 0 kB\n" in main()
401 "Size: 4 kB\n", in main()
402 "KernelPageSize: 4 kB\n", in main()
403 "MMUPageSize: 4 kB\n", in main()
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-sm-k26-revA.dts160 reg = <0x0 0x80000>; /* 512KB */
166 reg = <0x80000 0x80000>; /* 512KB */
172 reg = <0x100000 0x20000>; /* 128KB */
176 reg = <0x120000 0x20000>; /* 128KB */
180 reg = <0x140000 0xC0000>; /* 768KB */
188 reg = <0xF00000 0x80000>; /* 512KB */
198 reg = <0x1C80000 0x80000>; /* 512KB */
220 reg = <0x2200000 0x20000>; /* 128KB */
224 reg = <0x2220000 0x20000>; /* 128KB */
228 reg = <0x2240000 0x40000>; /* 256B but 256KB sector */
[all …]
/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Dhhf.json17 …hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non…
38 …refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non…
59 …fcnt [0-9]+.*quantum 9000b hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non…
80 …hf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 100ms admit_bytes 128Kb evict_timeout 1s non…
122 …hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 500ms …
143 …hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non…
150 "id": "32f9",
165 …refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s non…
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/
H A Dmetrics.json5 …@ - imx9_ddr0@ddrc_pm_4@ - imx9_ddr0@ddrc_pm_6@ - imx9_ddr0@ddrc_pm_8@ ) * 32 )) / duration_time) …
14 "ScaleUnit": "9.765625e-4KB",
21 … imx9_ddr0@ddrc_pm_2@ - imx9_ddr0@ddrc_pm_4@ - imx9_ddr0@ddrc_pm_6@ - imx9_ddr0@ddrc_pm_8@ ) * 32",
22 "ScaleUnit": "9.765625e-4KB",
/linux/drivers/media/platform/samsung/s5p-mfc/
H A Dregs-mfc-v8.h95 #define MFC_CTX_BUF_SIZE_V8 (36 * SZ_1K) /* 36KB */
97 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V8 (20 * SZ_1K) /* 20KB */
98 #define MFC_H264_ENC_CTX_BUF_SIZE_V8 (100 * SZ_1K) /* 100KB */
99 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V8 (10 * SZ_1K) /* 10KB */
115 + (DIV_ROUND_UP((mbw) * (mbh), 32) * 16))
121 #define MAX_FW_SIZE_V8 (SZ_512K) /* 512KB */
/linux/Documentation/devicetree/bindings/mtd/partitions/
H A Dredboot-fis.yaml14 32 KB in size.
28 device. On a flash memory with 32KB eraseblocks, 0 means the first
/linux/arch/powerpc/boot/dts/
H A Dxcalibur1501.dts33 d-cache-line-size = <32>; // 32 bytes
34 i-cache-line-size = <32>; // 32 bytes
35 d-cache-size = <0x8000>; // L1, 32K
36 i-cache-size = <0x8000>; // L1, 32K
46 d-cache-line-size = <32>; // 32 bytes
47 i-cache-line-size = <32>; // 32 bytes
48 d-cache-size = <0x8000>; // L1, 32K
49 i-cache-size = <0x8000>; // L1, 32K
92 reg = <0x7f00000 0x40000>; /* 256 KB */
96 reg = <0x7f40000 0x40000>; /* 256 KB */
[all …]

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