1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2cad82448SPaul Mundtmenu "Memory management options" 3cad82448SPaul Mundt 4cad82448SPaul Mundtconfig MMU 5cad82448SPaul Mundt bool "Support for memory management hardware" 6cad82448SPaul Mundt depends on !CPU_SH2 7*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_4KB 8*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_8KB if X2TLB 9*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_64KB if CPU_SH4 10cad82448SPaul Mundt default y 11cad82448SPaul Mundt help 12cad82448SPaul Mundt Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 13cad82448SPaul Mundt boot on these systems, this option must not be set. 14cad82448SPaul Mundt 15cad82448SPaul Mundt On other systems (such as the SH-3 and 4) where an MMU exists, 16cad82448SPaul Mundt turning this off will boot the kernel on these machines with the 17cad82448SPaul Mundt MMU implicitly switched off. 18cad82448SPaul Mundt 19*ba89f9c8SArnd Bergmannconfig NOMMU 20*ba89f9c8SArnd Bergmann def_bool !MMU 21*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_4KB 22*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_8KB 23*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_16KB 24*ba89f9c8SArnd Bergmann select HAVE_PAGE_SIZE_64KB 25*ba89f9c8SArnd Bergmann help 26*ba89f9c8SArnd Bergmann On MMU-less systems, any of these page sizes can be selected 27*ba89f9c8SArnd Bergmann 28e7f93a35SPaul Mundtconfig PAGE_OFFSET 29e7f93a35SPaul Mundt hex 3037744feeSArnd Bergmann default "0x80000000" if MMU 31e7f93a35SPaul Mundt default "0x00000000" 32e7f93a35SPaul Mundt 330192445cSZi Yanconfig ARCH_FORCE_MAX_ORDER 34b2a37fb2SMike Rapoport (IBM) int "Order of maximal physically contiguous allocations" 3523baf831SKirill A. Shutemov default "8" if PAGE_SIZE_16KB 3623baf831SKirill A. Shutemov default "6" if PAGE_SIZE_64KB 3723baf831SKirill A. Shutemov default "13" if !MMU 3823baf831SKirill A. Shutemov default "10" 39ad3256e3SPaul Mundt help 40b2a37fb2SMike Rapoport (IBM) The kernel page allocator limits the size of maximal physically 415e0a760bSKirill A. Shutemov contiguous allocations. The limit is called MAX_PAGE:_ORDER and it 42b2a37fb2SMike Rapoport (IBM) defines the maximal power of two of number of pages that can be 43b2a37fb2SMike Rapoport (IBM) allocated as a single contiguous block. This option allows 44b2a37fb2SMike Rapoport (IBM) overriding the default setting when ability to allocate very 45b2a37fb2SMike Rapoport (IBM) large blocks of physically contiguous memory is required. 46ad3256e3SPaul Mundt 47ad3256e3SPaul Mundt The page size is not necessarily 4KB. Keep this in mind when 48ad3256e3SPaul Mundt choosing a value for this option. 49ad3256e3SPaul Mundt 50b2a37fb2SMike Rapoport (IBM) Don't change if unsure. 51b2a37fb2SMike Rapoport (IBM) 52e7f93a35SPaul Mundtconfig MEMORY_START 53e7f93a35SPaul Mundt hex "Physical memory start address" 54e7f93a35SPaul Mundt default "0x08000000" 55a7f7f624SMasahiro Yamada help 56e7f93a35SPaul Mundt Computers built with Hitachi SuperH processors always 57e7f93a35SPaul Mundt map the ROM starting at address zero. But the processor 58e7f93a35SPaul Mundt does not specify the range that RAM takes. 59e7f93a35SPaul Mundt 60e7f93a35SPaul Mundt The physical memory (RAM) start address will be automatically 61e7f93a35SPaul Mundt set to 08000000. Other platforms, such as the Solution Engine 62e7f93a35SPaul Mundt boards typically map RAM at 0C000000. 63e7f93a35SPaul Mundt 64e7f93a35SPaul Mundt Tweak this only when porting to a new machine which does not 65e7f93a35SPaul Mundt already have a defconfig. Changing it from the known correct 66e7f93a35SPaul Mundt value on any of the known systems will only lead to disaster. 67e7f93a35SPaul Mundt 68e7f93a35SPaul Mundtconfig MEMORY_SIZE 69e7f93a35SPaul Mundt hex "Physical memory size" 70711fe436SPaul Mundt default "0x04000000" 71e7f93a35SPaul Mundt help 72e7f93a35SPaul Mundt This sets the default memory size assumed by your SH kernel. It can 73e7f93a35SPaul Mundt be overridden as normal by the 'mem=' argument on the kernel command 74e7f93a35SPaul Mundt line. If unsure, consult your board specifications or just leave it 75711fe436SPaul Mundt as 0x04000000 which was the default value before this became 76e7f93a35SPaul Mundt configurable. 77e7f93a35SPaul Mundt 7836bcd39dSPaul Mundt# Physical addressing modes 7936bcd39dSPaul Mundt 8036bcd39dSPaul Mundtconfig 29BIT 8136bcd39dSPaul Mundt def_bool !32BIT 82b0f3ae03SPaul Mundt select UNCACHED_MAPPING 8336bcd39dSPaul Mundt 84cad82448SPaul Mundtconfig 32BIT 8536bcd39dSPaul Mundt bool 8637744feeSArnd Bergmann default !MMU 8736bcd39dSPaul Mundt 88a0ab3668SPaul Mundtconfig PMB 89cad82448SPaul Mundt bool "Support 32-bit physical addressing through PMB" 900d57af1eSKees Cook depends on MMU && CPU_SH4A && !CPU_SH4AL_DSP 91a0ab3668SPaul Mundt select 32BIT 92b0f3ae03SPaul Mundt select UNCACHED_MAPPING 93cad82448SPaul Mundt help 94cad82448SPaul Mundt If you say Y here, physical addressing will be extended to 95cad82448SPaul Mundt 32-bits through the SH-4A PMB. If this is not set, legacy 96cad82448SPaul Mundt 29-bit physical addressing will be used. 97cad82448SPaul Mundt 9821440cf0SPaul Mundtconfig X2TLB 99782bb5a5SPaul Mundt def_bool y 100782bb5a5SPaul Mundt depends on (CPU_SHX2 || CPU_SHX3) && MMU 10121440cf0SPaul Mundt 10219f9a34fSPaul Mundtconfig VSYSCALL 10319f9a34fSPaul Mundt bool "Support vsyscall page" 104a09063daSPaul Mundt depends on MMU && (CPU_SH3 || CPU_SH4) 10519f9a34fSPaul Mundt default y 10619f9a34fSPaul Mundt help 10719f9a34fSPaul Mundt This will enable support for the kernel mapping a vDSO page 10819f9a34fSPaul Mundt in process space, and subsequently handing down the entry point 10919f9a34fSPaul Mundt to the libc through the ELF auxiliary vector. 11019f9a34fSPaul Mundt 11119f9a34fSPaul Mundt From the kernel side this is used for the signal trampoline. 11219f9a34fSPaul Mundt For systems with an MMU that can afford to give up a page, 11319f9a34fSPaul Mundt (the default value) say Y. 11419f9a34fSPaul Mundt 115b241cb0cSPaul Mundtconfig NUMA 1167fb0a1a5SRandy Dunlap bool "Non-Uniform Memory Access (NUMA) Support" 1170d57af1eSKees Cook depends on MMU && SYS_SUPPORTS_NUMA 118cbee9f88SPeter Zijlstra select ARCH_WANT_NUMA_VARIABLE_LOCALITY 119b241cb0cSPaul Mundt default n 120b241cb0cSPaul Mundt help 121b241cb0cSPaul Mundt Some SH systems have many various memories scattered around 122b241cb0cSPaul Mundt the address space, each with varying latencies. This enables 123b241cb0cSPaul Mundt support for these blocks by binding them to nodes and allowing 124b241cb0cSPaul Mundt memory policies to be used for prioritizing and controlling 125b241cb0cSPaul Mundt allocation behaviour. 126b241cb0cSPaul Mundt 12701066625SPaul Mundtconfig NODES_SHIFT 12801066625SPaul Mundt int 1299904494dSPaul Mundt default "3" if CPU_SUBTYPE_SHX3 13001066625SPaul Mundt default "1" 131a9ee6cf5SMike Rapoport depends on NUMA 13201066625SPaul Mundt 13301066625SPaul Mundtconfig ARCH_FLATMEM_ENABLE 13401066625SPaul Mundt def_bool y 135357d5946SPaul Mundt depends on !NUMA 13601066625SPaul Mundt 137dfbb9042SPaul Mundtconfig ARCH_SPARSEMEM_ENABLE 138dfbb9042SPaul Mundt def_bool y 139dfbb9042SPaul Mundt select SPARSEMEM_STATIC 140dfbb9042SPaul Mundt 141dfbb9042SPaul Mundtconfig ARCH_SPARSEMEM_DEFAULT 142dfbb9042SPaul Mundt def_bool y 143dfbb9042SPaul Mundt 144dfbb9042SPaul Mundtconfig ARCH_SELECT_MEMORY_MODEL 145dfbb9042SPaul Mundt def_bool y 146dfbb9042SPaul Mundt 1474d35b93aSMatt Flemingconfig IOREMAP_FIXED 1484d35b93aSMatt Fleming def_bool y 14937744feeSArnd Bergmann depends on X2TLB 1504d35b93aSMatt Fleming 151b0f3ae03SPaul Mundtconfig UNCACHED_MAPPING 152b0f3ae03SPaul Mundt bool 153b0f3ae03SPaul Mundt 154c993487eSPaul Mundtconfig HAVE_SRAM_POOL 155c993487eSPaul Mundt bool 156c993487eSPaul Mundt select GENERIC_ALLOCATOR 157c993487eSPaul Mundt 158cad82448SPaul Mundtchoice 159cad82448SPaul Mundt prompt "HugeTLB page size" 160ffb4a73dSPaul Mundt depends on HUGETLB_PAGE 16168b7c24cSPaul Mundt default HUGETLB_PAGE_SIZE_1MB if PAGE_SIZE_64KB 162cad82448SPaul Mundt default HUGETLB_PAGE_SIZE_64K 163cad82448SPaul Mundt 164cad82448SPaul Mundtconfig HUGETLB_PAGE_SIZE_64K 16521440cf0SPaul Mundt bool "64kB" 16668b7c24cSPaul Mundt depends on !PAGE_SIZE_64KB 16721440cf0SPaul Mundt 16821440cf0SPaul Mundtconfig HUGETLB_PAGE_SIZE_256K 16921440cf0SPaul Mundt bool "256kB" 17021440cf0SPaul Mundt depends on X2TLB 171cad82448SPaul Mundt 172cad82448SPaul Mundtconfig HUGETLB_PAGE_SIZE_1MB 173cad82448SPaul Mundt bool "1MB" 174cad82448SPaul Mundt 17521440cf0SPaul Mundtconfig HUGETLB_PAGE_SIZE_4MB 17621440cf0SPaul Mundt bool "4MB" 17721440cf0SPaul Mundt depends on X2TLB 17821440cf0SPaul Mundt 17921440cf0SPaul Mundtconfig HUGETLB_PAGE_SIZE_64MB 18021440cf0SPaul Mundt bool "64MB" 18121440cf0SPaul Mundt depends on X2TLB 18221440cf0SPaul Mundt 183cad82448SPaul Mundtendchoice 184cad82448SPaul Mundt 185896f0c0eSPaul Mundtconfig SCHED_MC 186896f0c0eSPaul Mundt bool "Multi-core scheduler support" 187896f0c0eSPaul Mundt depends on SMP 188896f0c0eSPaul Mundt default y 189896f0c0eSPaul Mundt help 190896f0c0eSPaul Mundt Multi-core scheduler support improves the CPU scheduler's decision 191896f0c0eSPaul Mundt making when dealing with multi-core CPU chips at a cost of slightly 192896f0c0eSPaul Mundt increased overhead in some places. If unsure say N here. 193896f0c0eSPaul Mundt 194cad82448SPaul Mundtendmenu 195cad82448SPaul Mundt 196cad82448SPaul Mundtmenu "Cache configuration" 197cad82448SPaul Mundt 198cad82448SPaul Mundtconfig SH7705_CACHE_32KB 199cad82448SPaul Mundt bool "Enable 32KB cache size for SH7705" 200cad82448SPaul Mundt depends on CPU_SUBTYPE_SH7705 201cad82448SPaul Mundt default y 202cad82448SPaul Mundt 203e7bd34a1SPaul Mundtchoice 204e7bd34a1SPaul Mundt prompt "Cache mode" 20537744feeSArnd Bergmann default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 206e7bd34a1SPaul Mundt default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A) 207e7bd34a1SPaul Mundt 208e7bd34a1SPaul Mundtconfig CACHE_WRITEBACK 209e7bd34a1SPaul Mundt bool "Write-back" 210e7bd34a1SPaul Mundt 211e7bd34a1SPaul Mundtconfig CACHE_WRITETHROUGH 212e7bd34a1SPaul Mundt bool "Write-through" 213cad82448SPaul Mundt help 214cad82448SPaul Mundt Selecting this option will configure the caches in write-through 215cad82448SPaul Mundt mode, as opposed to the default write-back configuration. 216cad82448SPaul Mundt 217cad82448SPaul Mundt Since there's sill some aliasing issues on SH-4, this option will 218cad82448SPaul Mundt unfortunately still require the majority of flushing functions to 219cad82448SPaul Mundt be implemented to deal with aliasing. 220cad82448SPaul Mundt 221cad82448SPaul Mundt If unsure, say N. 222cad82448SPaul Mundt 223e7bd34a1SPaul Mundtconfig CACHE_OFF 224e7bd34a1SPaul Mundt bool "Off" 225e7bd34a1SPaul Mundt 226e7bd34a1SPaul Mundtendchoice 227e7bd34a1SPaul Mundt 228cad82448SPaul Mundtendmenu 229