Lines Matching +full:32 +full:kb
33 d-cache-line-size = <32>; // 32 bytes
34 i-cache-line-size = <32>; // 32 bytes
35 d-cache-size = <0x8000>; // L1, 32K
36 i-cache-size = <0x8000>; // L1, 32K
46 d-cache-line-size = <32>; // 32 bytes
47 i-cache-line-size = <32>; // 32 bytes
48 d-cache-size = <0x8000>; // L1, 32K
49 i-cache-size = <0x8000>; // L1, 32K
92 reg = <0x7f00000 0x40000>; /* 256 KB */
96 reg = <0x7f40000 0x40000>; /* 256 KB */
100 reg = <0x7f80000 0x80000>; /* 512 KB */
122 reg = <0x7f00000 0x40000>; /* 256 KB */
126 reg = <0x7f40000 0x40000>; /* 256 KB */
130 reg = <0x7f80000 0x80000>; /* 512 KB */
157 bus-width = <32>;
201 cache-line-size = <32>; // 32 bytes
478 interrupts = <31 2 32 2 33 2>;