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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmti,gic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Burton <paulburton@kernel.org>
11 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
15 It also supports local (per-processor) interrupts and software-generated
16 interrupts which can be used as IPIs. The GIC also includes a free-running
17 global timer, per-CPU count/compare timers, and a watchdog.
23 "#interrupt-cells":
[all …]
H A Dfsl,intmux.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,intmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - NXP Linux Team <linux-imx@nxp.com>
15 const: fsl,imx-intmux
27 interrupt-controller: true
29 '#interrupt-cells':
30 const: 2
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H A Dsunplus,sp7021-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Qin Jian <qinjian@cqplus1.com>
16 - const: sunplus,sp7021-intc
19 maxItems: 2
23 The 2nd region include clear/masked_ext0/masked_ext1/group regs.
25 interrupt-controller: true
27 "#interrupt-cells":
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H A Darm,gic-v5-iwb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5-iwb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
24 - $ref: /schemas/interrupt-controller.yaml#
28 const: arm,gic-v5-iwb
32 - description: IWB control frame
34 "#address-cells":
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H A Dimg,pdc-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - James Hogan <jhogan@kernel.org>
19 const: img,pdc-intc
24 interrupt-controller: true
26 '#interrupt-cells':
28 <1st-cell>: The interrupt-number that identifies the interrupt source.
29 0-7: Peripheral interrupts
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H A Dapple,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
[all …]
H A Dbrcm,bcm2835-armctrl-ic.yaml2 ---
3 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Florian Fainelli <florian.fainelli@broadcom.com>
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
13 The BCM2835 contains a custom top-level interrupt controller, which supports
14 72 interrupt sources using a 2-level register scheme. The interrupt
19 but the per-CPU interrupt controller is the root, and an interrupt there
27 2: ARM_DOORBELL_0
37 2: TIMER2
[all …]
H A Darm,gic-v5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
21 - one or more IRS (Interrupt Routing Service)
22 - zero or more ITS (Interrupt Translation Service)
25 - PE-Private Peripheral Interrupts (PPI)
26 - Shared Peripheral Interrupts (SPI)
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H A Dsnps,archs-idu-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,archs-idu-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARC-HS Interrupt Distribution Unit
10 - Vineet Gupta <vgupta@kernel.org>
13 ARC-HS Interrupt Distribution Unit is an optional 2nd level interrupt
22 const: snps,archs-idu-intc
24 interrupt-controller: true
26 '#interrupt-cells':
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
15 - reset-names: should contain the reset signal name "mac"(required)
17 - phy-mode: see ethernet.txt [1].
[all …]
H A Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dsodaville.txt14 - <1st cell>: The interrupt-number that identifies the interrupt source.
15 - <2nd cell>: The level-sense information, encoded as follows:
16 4 - active high level-sensitive
17 8 - active low level-sensitive
23 #gpio-cells = <2>;
24 #interrupt-cells = <2>;
25 compatible = "pci8086,2e67.2",
26 "pci8086,2e67",
34 interrupt-controller;
35 gpio-controller;
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst-rproc.txt1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and "pwr_reset"
[all …]
/linux/arch/powerpc/boot/dts/
H A Dlite5200b.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Secret Lab Technologies Ltd.
11 &gpt0 { fsl,has-wdt; };
12 &gpt2 { gpio-controller; };
13 &gpt3 { gpio-controller; };
20 compatible = "gpio-leds";
26 linux,default-trigger = "heartbeat";
28 led1 { gpios = <&gpio_wkup 2 1>; };
31 led4 { gpios = <&gpio_simple 2 1>; };
40 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
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H A Dfsp2.dts7 * License version 2. This program is licensed "as is" without
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
[all …]
H A Dpcm030.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phyCORE-MPC5200B-tiny (pcm030) board Device Tree Source
13 &gpt0 { fsl,has-wdt; };
14 &gpt2 { gpio-controller; };
15 &gpt3 { gpio-controller; };
16 &gpt4 { gpio-controller; };
17 &gpt5 { gpio-controller; };
18 &gpt6 { gpio-controller; };
19 &gpt7 { gpio-controller; };
27 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
[all …]
H A Dpcm032.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
5 * Copyright (C) 2006-2009 Pengutronix
11 &gpt0 { fsl,has-wdt; };
12 &gpt2 { gpio-controller; };
13 &gpt3 { gpio-controller; };
14 &gpt4 { gpio-controller; };
15 &gpt5 { gpio-controller; };
16 &gpt6 { gpio-controller; };
17 &gpt7 { gpio-controller; };
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-am654-serdes.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Kishon Vijay Abraham I <kishon@ti.com>
19 - ti,phy-am654-serdes
24 reg-names:
26 - const: serdes
28 power-domains:
37 '#phy-cells':
[all …]
/linux/drivers/irqchip/
H A Dirq-imx-intmux.c1 // SPDX-License-Identifier: GPL-2.0
7 * interrupt source # 0 +---->| |
9 * interrupt source # 1 +++-->| |
10 * ... | | | channel # 0 |--------->interrupt out # 0
13 * interrupt source # X-1 +++-->|________________|
17 * +---->| |
19 * | +-->| |
20 * | | | | channel # 1 |--------->interrupt out # 1
30 * +---->| |
32 * +-->| |
[all …]
/linux/arch/powerpc/platforms/powermac/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2003-2005 Benjamin Herrenschmuidt (benh@kernel.crashing.org)
21 #include <asm/pci-bridge.h>
25 #include <asm/ppc-pci.h>
37 /* XXX Could be per-controller, but I don't think we risk anything by
48 struct device_node *k2_skiplist[2];
62 for (; node; node = node->sibling) { in fixup_one_level_bus_range()
67 /* For PCI<->PCI bridges or CardBus bridges, we go down */ in fixup_one_level_bus_range()
68 class_code = of_get_property(node, "class-code", NULL); in fixup_one_level_bus_range()
72 bus_range = of_get_property(node, "bus-range", &len); in fixup_one_level_bus_range()
[all …]
/linux/Documentation/scsi/
H A Daic79xx.rst1 .. SPDX-License-Identifier: GPL-2.0
13 2. Version History
28 AIC-7901A Single Channel 64-bit PCI-X 133MHz to
30 AIC-7901B Single Channel 64-bit PCI-X 133MHz to
32 AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
34 AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
41 Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B
43 68-pin, two internal 68-pin)
44 Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B
46 68-pin, two internal 68-pin)
[all …]
/linux/drivers/usb/host/
H A Dohci-pci.c1 // SPDX-License-Identifier: GPL-1.0+
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
26 #include "pci-quirks.h"
30 static const char hcd_name[] = "ohci-pci";
33 /*-------------------------------------------------------------------------*/
37 device_init_wakeup(&hcd->self.root_hub->dev, 0); in broken_suspend()
48 ohci->flags = OHCI_QUIRK_AMD756; in ohci_quirk_amd756()
74 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); in ohci_quirk_ns()
77 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1)); in ohci_quirk_ns()
78 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO in ohci_quirk_ns()
[all …]
/linux/sound/soc/fsl/
H A Dfsl-asoc-card.c1 // SPDX-License-Identifier: GPL-2.0
23 #include "imx-audmux.h"
33 #define DRIVER_NAME "fsl-asoc-card"
44 * struct codec_priv - CODEC private data
62 * struct cpu_priv - CPU private data
73 unsigned long sysclk_freq[2];
74 u32 sysclk_dir[2];
[all...]
/linux/drivers/media/pci/tw5864/
H A Dtw5864-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
22 #define TW5864_EMU_EN_SEN BIT(2)
76 * 0->3 4 VLC data buffer in DDR (1M each)
77 * 0->7 8 VLC data buffer in DDR (512k each)
79 #define TW5864_VLC_BUF_ID (7 << 2)
86 * 0 2 falf D1 in 1 MB
[all …]
/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_driver.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
59 /*------------------------------------------------------------------------------
61 ------------------------------------------------------------------------------*/
68 * \retval -EIO Initialization failed.
77 * \retval -EIO Termination failed.
97 * \retval -EIO Failure.
98 * \retval -EINVAL Parameter 'wcount' is not zero but parameter
132 #define TUNER_MODE_SUB0 0x0001 /* for sub-mode (e.g. RF-AGC setting) */
133 #define TUNER_MODE_SUB1 0x0002 /* for sub-mode (e.g. RF-AGC setting) */
134 #define TUNER_MODE_SUB2 0x0004 /* for sub-mode (e.g. RF-AGC setting) */
[all …]

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