Lines Matching +full:2 +full:nd +full:- +full:cell
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
5 * Copyright (C) 2006-2009 Pengutronix
11 &gpt0 { fsl,has-wdt; };
12 &gpt2 { gpio-controller; };
13 &gpt3 { gpio-controller; };
14 &gpt4 { gpio-controller; };
15 &gpt5 { gpio-controller; };
16 &gpt6 { gpio-controller; };
17 &gpt7 { gpio-controller; };
29 compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
30 cell-index = <0>;
33 /* PSC2 port is used by CAN1/2 */
39 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
52 psc@2c00 { /* PSC6 in UART mode */
53 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
57 phy-handle = <&phy0>;
61 phy0: ethernet-phy@0 {
80 interrupt-map-mask = <0xf800 0 0 7>;
81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
82 0xc000 0 0 2 &mpc5200_pic 1 1 3
83 0xc000 0 0 3 &mpc5200_pic 1 2 3
86 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
87 0xc800 0 0 2 &mpc5200_pic 1 2 3
98 2 0 0xfbe00000 0x00200000
106 compatible = "cfi-flash";
108 bank-width = <4>;
109 #size-cells = <1>;
110 #address-cells = <1>;
142 sram@2,0 {
143 compatible = "mtd-ram";
144 reg = <2 0 0x00200000>;
145 bank-width = <2>;
154 * bank-width = <4>;
160 * bank-width = <4>;