Home
last modified time | relevance | path

Searched +full:1 +full:mib (Results 1 – 25 of 853) sorted by relevance

12345678910>>...35

/freebsd/lib/libc/gen/
H A Dsysconf.c13 * 1. Redistributions of source code must retain the above copyright
63 * POSIX 1003.1 (ISO/IEC 9945-1, 4.8.1.3) states that the variable values
75 int mib[2], sverrno, value; in sysconf() local
79 defaultresult = -1; in sysconf()
83 mib[0] = CTL_KERN; in sysconf()
84 mib[1] = KERN_ARGMAX; in sysconf()
88 return (-1); in sysconf()
90 return (-1); in sysconf()
93 return (-1); in sysconf()
99 mib[0] = CTL_KERN; in sysconf()
[all …]
H A D__xuname.c10 * 1. Redistributions of source code must retain the above copyright
42 int mib[2], rval; in __xuname() local
50 mib[0] = CTL_KERN; in __xuname()
55 mib[1] = KERN_OSTYPE; in __xuname()
58 if (sysctl(mib, 2, q, &len, NULL, 0) == -1) { in __xuname()
62 rval = -1; in __xuname()
64 q[namesize - 1] = '\0'; in __xuname()
68 mib[1] = KERN_HOSTNAME; in __xuname()
71 if (sysctl(mib, 2, q, &len, NULL, 0) == -1) { in __xuname()
75 rval = -1; in __xuname()
[all …]
/freebsd/tests/sys/kern/
H A Dsysctl_kern_proc.c33 int mib[4], pid_max; in sysctl_kern_proc_all() local
40 mib[0] = CTL_KERN; in sysctl_kern_proc_all()
41 mib[1] = KERN_PROC; in sysctl_kern_proc_all()
42 mib[2] = cmd; in sysctl_kern_proc_all()
43 for (int i = 1; i <= pid_max; i++) { in sysctl_kern_proc_all()
44 mib[3] = i; in sysctl_kern_proc_all()
46 if (sysctl(mib, 4, NULL, &sz, NULL, 0) == 0) { in sysctl_kern_proc_all()
49 (void)sysctl(mib, 4, buf, &sz, NULL, 0); in sysctl_kern_proc_all()
54 mib[3] = -1; in sysctl_kern_proc_all()
55 ATF_REQUIRE_ERRNO(ESRCH, sysctl(mib, 4, NULL, &sz, NULL, 0) != 0); in sysctl_kern_proc_all()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp47 bool selectCmp(CmpConstants Helper, MachineInstrBuilder &MIB,
50 // Helper for inserting a comparison sequence that sets \p ResReg to either 1
60 bool selectGlobal(MachineInstrBuilder &MIB, MachineRegisterInfo &MRI) const;
61 bool selectSelect(MachineInstrBuilder &MIB, MachineRegisterInfo &MRI) const;
62 bool selectShift(unsigned ShiftOpc, MachineInstrBuilder &MIB) const;
142 int OpIdx = -1) const;
144 int OpIdx = -1) const;
145 void renderInvertedImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
146 int OpIdx = -1) const;
233 static bool selectMergeValues(MachineInstrBuilder &MIB, in selectMergeValues() argument
[all …]
H A DMVETailPredUtils.h108 MachineInstrBuilder MIB = variable
110 MIB.add(MI->getOperand(1));
111 MIB.addImm(0);
112 MIB.addImm(ARMCC::AL);
113 MIB.addReg(ARM::NoRegister);
115 MachineInstrBuilder MIB = variable
117 MIB.add(MI->getOperand(0));
118 MIB.add(MI->getOperand(1));
119 MIB.addImm(0);
120 MIB.addImm(ARMCC::AL);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp61 void preISelLower(MachineInstr &MI, MachineIRBuilder &MIB,
64 bool replacePtrWithInt(MachineOperand &Op, MachineIRBuilder &MIB,
69 bool selectImplicitDef(MachineInstr &MI, MachineIRBuilder &MIB,
71 bool materializeImm(Register Reg, int64_t Imm, MachineIRBuilder &MIB) const;
72 bool selectAddr(MachineInstr &MI, MachineIRBuilder &MIB,
75 bool selectSExtInreg(MachineInstr &MI, MachineIRBuilder &MIB) const;
76 bool selectSelect(MachineInstr &MI, MachineIRBuilder &MIB,
78 bool selectFPCompare(MachineInstr &MI, MachineIRBuilder &MIB,
81 MachineIRBuilder &MIB) const;
82 bool selectMergeValues(MachineInstr &MI, MachineIRBuilder &MIB,
[all …]
H A DRISCVLegalizerInfo.cpp52 (Query.Types[TypeIdx].getElementCount().getKnownMinValue() != 1 || in typeIsLegalIntOrFPVec()
64 (Query.Types[TypeIdx].getElementCount().getKnownMinValue() != 1 || in typeIsLegalBoolVec()
74 const LLT s1 = LLT::scalar(1); in RISCVLegalizerInfo()
80 const LLT nxv1s1 = LLT::scalable_vector(1, s1); in RISCVLegalizerInfo()
88 const LLT nxv1s8 = LLT::scalable_vector(1, s8); in RISCVLegalizerInfo()
96 const LLT nxv1s16 = LLT::scalable_vector(1, s16); in RISCVLegalizerInfo()
103 const LLT nxv1s32 = LLT::scalable_vector(1, s32); in RISCVLegalizerInfo()
109 const LLT nxv1s64 = LLT::scalable_vector(1, s64); in RISCVLegalizerInfo()
143 .clampScalar(1, s32, sXLen) in RISCVLegalizerInfo()
145 .minScalarSameAs(1, 0) in RISCVLegalizerInfo()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.cpp157 // if (iter->getOperand(1).isUndef()) in AnalyzeBranchImpl()
231 assert(Cond.size() == 1); in AnalyzeBranchImpl()
285 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
293 return 1; in insertBranch()
351 bool M68kInstrInfo::ExpandMOVI(MachineInstrBuilder &MIB, MVT MVTSize) const { in ExpandMOVI() argument
352 Register Reg = MIB->getOperand(0).getReg(); in ExpandMOVI()
353 int64_t Imm = MIB->getOperand(1).getImm(); in ExpandMOVI()
363 LLVM_DEBUG(dbgs() << "Expand " << *MIB.getInstr() << " to "); in ExpandMOVI()
373 MIB->setDesc(get(M68k::MOVQ)); in ExpandMOVI()
374 MIB->getOperand(0).setReg(SReg); in ExpandMOVI()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Ddebugfs.c65 if (count && buf[count - 1] == '\n') in mt7915_sys_recovery_set()
66 buf[count - 1] = '\0'; in mt7915_sys_recovery_set()
76 * 1: trigger & enable system error L1 recovery. in mt7915_sys_recovery_set()
104 ret = mt7915_mcu_set_ser(dev, 1, 3, band); in mt7915_sys_recovery_set()
145 "1: trigger system error L1 recovery\n"); in mt7915_sys_recovery_get()
289 phy->mib.dl_cck_cnt, in mt7915_muru_stats_show()
290 phy->mib.dl_ofdm_cnt, in mt7915_muru_stats_show()
291 phy->mib.dl_htmix_cnt, in mt7915_muru_stats_show()
292 phy->mib.dl_htgf_cnt, in mt7915_muru_stats_show()
293 phy->mib.dl_vht_su_cnt); in mt7915_muru_stats_show()
[all …]
H A Dmain.c125 mt76_connac_mcu_set_pm(&dev->mt76, phy->mt76->band_idx, 1); in mt7915_stop()
130 mt76_connac_mcu_set_pm(&dev->mt76, dev->phy.mt76->band_idx, 1); in mt7915_stop()
150 /* prefer hw bssid slot 1-3 */ in get_omac_idx()
153 return i - 1; in get_omac_idx()
160 return i - 1; in get_omac_idx()
174 return i - 1; in get_omac_idx()
178 WARN_ON(1); in get_omac_idx()
182 return -1; in get_omac_idx()
254 mvif->sta.wcid.hw_key_idx = -1; in mt7915_add_interface()
272 memset(&mvif->cap, -1, sizeof(mvif->cap)); in mt7915_add_interface()
[all …]
/freebsd/crypto/openssl/crypto/
H A Dia64cpuid.S20 { .mib; br.ret.sptk.many b0 };;
26 { .mib; mov r8=ar.itc
44 { .mib; cmp.ne p6,p0=r2,r3
47 { .mib; nop.m 0
67 { .mib; alloc r2=ar.pfs,0,96,0,96
76 mov ar.ec=1 };;
137 { .mib; mov r8=sp
145 { .mib; cmp.eq p6,p0=0,r33 // len==0
148 { .mib; and r2=7,r32
153 { .mib; st1 [r32]=r0,1
[all …]
/freebsd/sys/netinet/
H A Din_kdtrace.h8 * 1. Redistributions of source code must retain the above copyright
58 SDT_PROVIDER_DECLARE(mib);
60 SDT_PROBE_DECLARE(mib, ip, count, ips_total);
61 SDT_PROBE_DECLARE(mib, ip, count, ips_badsum);
62 SDT_PROBE_DECLARE(mib, ip, count, ips_tooshort);
63 SDT_PROBE_DECLARE(mib, ip, count, ips_toosmall);
64 SDT_PROBE_DECLARE(mib, ip, count, ips_badhlen);
65 SDT_PROBE_DECLARE(mib, ip, count, ips_badlen);
66 SDT_PROBE_DECLARE(mib, ip, count, ips_fragments);
67 SDT_PROBE_DECLARE(mib, ip, count, ips_fragdropped);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp73 ? Def->getOperand(1).getReg() in getWaveAddress()
88 if (!Ty.isValid() || Ty.getSizeInBits() != 1) in isVCC()
102 MI.removeOperand(1); // Remove intrinsic ID. in constrainCopyLikeIntrin()
106 MachineOperand &Src = MI.getOperand(1); in constrainCopyLikeIntrin()
109 if (MRI->getType(Dst.getReg()) == LLT::scalar(1)) in constrainCopyLikeIntrin()
128 const MachineOperand &Src = I.getOperand(1); in selectCOPY()
156 .addImm(ConstVal->Value.getBoolValue() ? -1 : 0); in selectCOPY()
168 .addImm(1) in selectCOPY()
213 if (DefTy == LLT::scalar(1)) in selectPHI()
330 .add(I.getOperand(1)) in selectG_ADD_SUB()
[all …]
/freebsd/usr.sbin/bsnmpd/modules/snmp_lm75/
H A Dsnmp_lm75.c8 * 1. Redistributions of source code must retain the above copyright
85 "This module implements the BEGEMOT MIB for reading LM75 sensors data.",
109 "The MIB module for reading lm75 sensors data.", module); in lm75_start()
137 int mib[12]; in sysctlname() local
139 if (nlen > (int)(sizeof(mib) / sizeof(int) - 2)) in sysctlname()
140 return (-1); in sysctlname()
142 mib[0] = 0; in sysctlname()
143 mib[1] = 1; in sysctlname()
144 memcpy(mib + 2, oid, nlen * sizeof(int)); in sysctlname()
146 if (sysctl(mib, nlen + 2, name, &len, 0, 0) == -1) in sysctlname()
[all …]
/freebsd/sys/dev/bfe/
H A Dif_bfereg.h9 * 1. Redistributions of source code must retain the above copyright
114 #define BFE_RX_CTRL_ROSHIFT 1 /* Receive Offset Shift */
151 #define BFE_MDIO_OP_WRITE 1
158 #define BFE_EMAC_INT_MIB 0x00000002 /* MIB Interrupt */
188 #define BFE_MIB_CTRL 0x00000438 /* EMAC MIB Control */
192 #define BFE_TX_GOOD_O 0x00000500 /* MIB TX Good Octets */
193 #define BFE_TX_GOOD_P 0x00000504 /* MIB TX Good Packets */
194 #define BFE_TX_O 0x00000508 /* MIB TX Octets */
195 #define BFE_TX_P 0x0000050C /* MIB TX Packets */
196 #define BFE_TX_BCAST 0x00000510 /* MIB TX Broadcast Packets */
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
66 assert(Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8); in getFullAddress()
104 const MachineOperand &Op1 = MI->getOperand(Operand + 1); in getAddressFromInstr()
124 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem() argument
126 // values, this adds: Reg, 1, NoReg, 0, NoReg to the instruction. in addDirectMem()
127 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0); in addDirectMem()
134 // Direct memory address is in a form of: Reg/FI, 1 (Scale), NoReg, 0, NoReg. in setDirectAddressInInstr()
136 MI->getOperand(Operand + 1).setImm(1); in setDirectAddressInInstr()
143 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset() argument
144 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0); in addOffset()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp78 GR->add(ElemConst, &MF, BuildVec->getOperand(1 + i).getReg()); in addConstantsToTrack()
80 BuildVec->getOperand(1 + i).setReg(ElemReg); in addConstantsToTrack()
92 MachineIRBuilder MIB(MF); in addConstantsToTrack() local
94 GR->getOrCreateSPIRVType(Const->getType(), MIB); in addConstantsToTrack()
143 ConstMI->getOperand(1).getCImm()->getZExtValue())); in foldConstantsIntoIntrinsics()
162 UseMI->getOperand(1).getReg() == Reg) in findAssignTypeInstr()
169 MachineIRBuilder MIB) { in insertBitcasts() argument
172 static_cast<const SPIRVSubtarget *>(&MIB.getMF().getSubtarget()); in insertBitcasts()
180 MIB.setInsertPt(*MI.getParent(), MI); in insertBitcasts()
183 MIB.buildBitcast(MI.getOperand(0).getReg(), MI.getOperand(2).getReg()); in insertBitcasts()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp45 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr() argument
46 getMBB().insert(getInsertPt(), MIB); in insertInstr()
47 recordInsertion(MIB); in insertInstr()
48 return MIB; in insertInstr()
100 auto MIB = buildInstrNoInsert(TargetOpcode::DBG_VALUE); in buildConstDbgValue() local
111 MIB.addCImm(CI); in buildConstDbgValue()
113 MIB.addImm(CI->getZExtValue()); in buildConstDbgValue()
115 MIB.addFPImm(CFP); in buildConstDbgValue()
117 MIB.addImm(0); in buildConstDbgValue()
120 MIB.addReg(Register()); in buildConstDbgValue()
[all …]
H A DCSEMIRBuilder.cpp128 MachineInstrBuilder CSEMIRBuilder::memoizeMI(MachineInstrBuilder MIB, in memoizeMI() argument
130 assert(canPerformCSEForOpc(MIB->getOpcode()) && in memoizeMI()
132 MachineInstr *MIBInstr = MIB; in memoizeMI()
134 return MIB; in memoizeMI()
138 if (DstOps.size() == 1) in checkCopyToDefsPossible()
139 return true; // always possible to emit copy to just 1 vreg. in checkCopyToDefsPossible()
149 MachineInstrBuilder &MIB) { in generateCopiesIfRequired() argument
151 "Impossible return a single MIB with copies to multiple defs"); in generateCopiesIfRequired()
152 if (DstOps.size() == 1) { in generateCopiesIfRequired()
155 return buildCopy(Op.getReg(), MIB.getReg(0)); in generateCopiesIfRequired()
[all …]
/freebsd/contrib/bsnmp/snmp_mibII/
H A DmibII_interfaces.c11 * 1. Redistributions of source code must retain the above copyright
81 if (ioctl(mib_netsock, SIOCGIFFLAGS, &ifr) == -1) { in ifchange_func()
99 if (ioctl(mib_netsock, SIOCGIFFLAGS, &ifr1) == -1) { in ifchange_func()
104 if (ioctl(mib_netsock, SIOCSIFFLAGS, &ifr) == -1) { in ifchange_func()
121 if (ioctl(mib_netsock, SIOCSIFFLAGS, &ifr) == -1) { in ifchange_func()
178 switch (value->var.subs[sub - 1]) { in op_interfaces()
204 value->var.len = sub + 1; in op_ifentry()
209 if (value->var.len - sub != 1) in op_ifentry()
216 if (value->var.len - sub != 1) in op_ifentry()
220 if (value->var.subs[sub - 1] != LEAF_ifAdminStatus) in op_ifentry()
[all …]
/freebsd/sbin/ipf/ipsend/
H A D44arp.c43 if (add == -1) in resolve()
48 return (-1); in resolve()
60 int mib[6]; in arp() local
73 return (-1); in arp()
75 mib[0] = CTL_NET; in arp()
76 mib[1] = PF_ROUTE; in arp()
77 mib[2] = 0; in arp()
78 mib[3] = AF_INET; in arp()
79 mib[4] = NET_RT_FLAGS; in arp()
81 mib[5] = RTF_LLINFO; in arp()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp45 while (N && Node->getValueType(N - 1) == MVT::Glue) in CountResults()
47 if (N && Node->getValueType(N - 1) == MVT::Other) in CountResults()
62 while (N && Node->getOperand(N - 1).getValueType() == MVT::Glue) in countOperands()
64 if (N && Node->getOperand(N - 1).getValueType() == MVT::Other) in countOperands()
70 if (isa<RegisterMaskSDNode>(Node->getOperand(I - 1))) in countOperands()
72 if (RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Node->getOperand(I - 1))) in countOperands()
114 Register DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); in EmitCopyFromReg()
187 MachineInstrBuilder &MIB, in CreateVirtualRegisters() argument
225 MIB.addReg(VRBase, RegState::Define); in CreateVirtualRegisters()
233 Register Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg(); in CreateVirtualRegisters()
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/memprof/
H A Dmemprof_rawprofile.cpp29 void RecordStackId(const uptr Key, UNUSED LockedMemInfoBlock *const &MIB, in RecordStackId() argument
31 // No need to touch the MIB value here since we are only recording the key. in RecordStackId()
136 *(u64 *)(Ptr - (Count + 1) * sizeof(u64)) = Count; in SerializeStackToBuffer()
143 // The MIB section has the following format:
144 // ---------- MIB Info
146 // ---------- MIB Entry 0
151 // ---- AccessHistogram Entry AccessHistogramSize - 1
152 // ---------- MIB Entry 1
157 // ---- AccessHistogram Entry AccessHistogramSize - 1
172 Ptr = WriteBytes((*h)->mib, Ptr); in SerializeMIBInfoToBuffer()
[all …]
/freebsd/usr.sbin/bsnmpd/modules/snmp_bridge/
H A Dsnmp_bridge.38 .\" 1. Redistributions of source code must retain the above copyright
37 module implements the BRIDGE-MIB as standardized in RFC 4188, the RSTP-MIB
38 standardized in RFC4318 and a private BEGEMOT-BRIDGE-MIB, which allows
40 Most of the objects defined in the private BEGEMOT-BRIDGE-MIB are duplicates
41 of the original objects defined by the standard BRIDGE-MIB, but the private
101 The description of the MIB tree implemented by
103 .It Pa /usr/share/snmp/mibs/BRIDGE-MIB.txt
104 This is the BRIDGE-MIB that is implemented by this module.
105 .It Pa /usr/share/snmp/mibs/RSTP-MIB.txt
106 This is the RSTP-MIB implemented by this module.
[all …]
/freebsd/contrib/bsnmp/gensnmptree/
H A Dgensnmptree.114 .\" 1. Redistributions of source code must retain the above copyright
32 .\" $Begemot: gensnmptree.1 383 2006-05-30 07:40:49Z brandt_h $
39 .Nd "generate C and header files from a MIB description file"
51 a MIB description or to numeric OIDs from MIB descriptions.
53 .Xr bsnmpd 1
64 reads a MIB description from its standard input and creates two files: a
68 .Xr bsnmpd 1
87 expects MIB variable names (only the last component) on its command line.
88 It reads a MIB specification from standard input and for each MIB variable
118 .Xr bsnmpd 1 .
[all …]

12345678910>>...35