Home
last modified time | relevance | path

Searched +full:16 +full:- +full:bits (Results 1 – 25 of 1075) sorted by relevance

12345678910>>...43

/linux/arch/parisc/include/asm/
H A Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
60 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
65 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
[all …]
/linux/Documentation/filesystems/ext4/
H A Dgroup_descr.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------------------
38 checksum is the lower 16 bits of the checksum of the FS UUID, the group
45 .. list-table::
47 :header-rows: 1
49 * - Offset
50 - Size
51 - Name
52 - Description
53 * - 0x0
[all …]
/linux/drivers/net/ipa/reg/
H A Dipa_reg-v4.5.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
29 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
32 /* Bits 22-31 reserved */
54 [H_DCPH] = BIT(16),
78 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
80 /* Bits 22-23 reserved */
82 /* Bits 25-31 reserved */
89 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v5.5.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
6 #include <linux/bits.h>
15 [MAX_PROD_PIPES] = GENMASK(23, 16),
38 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
39 /* Bits 17-18 reserved */
44 /* Bits 28-29 reserved */
68 [H_DCPH] = BIT(16),
91 [ROUTE_DEF_HDR_OFST] = GENMASK(25, 16),
95 /* Bits 29-31 reserved */
[all …]
H A Dipa_reg-v5.0.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2023-2024 Linaro Ltd. */
6 #include <linux/bits.h>
15 [MAX_PROD_PIPES] = GENMASK(23, 16),
38 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
45 /* Bits 28-29 reserved */
69 [H_DCPH] = BIT(16),
92 [ROUTE_DEF_HDR_OFST] = GENMASK(25, 16),
96 /* Bits 29-31 reserved */
103 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v4.7.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
29 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
32 /* Bits 22-31 reserved */
54 [H_DCPH] = BIT(16),
78 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
80 /* Bits 22-23 reserved */
82 /* Bits 25-31 reserved */
89 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v4.11.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
29 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
36 /* Bits 24-29 reserved */
60 [H_DCPH] = BIT(16),
84 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
86 /* Bits 22-23 reserved */
88 /* Bits 25-31 reserved */
95 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v4.9.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
29 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
35 /* Bits 25-29 reserved */
59 [H_DCPH] = BIT(16),
83 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
85 /* Bits 22-23 reserved */
87 /* Bits 25-31 reserved */
94 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v4.2.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
29 [IPA_QMB_SELECT_GLOBAL_EN] = BIT(16),
31 /* Bits 21-31 reserved */
53 [H_DCPH] = BIT(16),
67 /* Bits 30-31 reserved */
76 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
78 /* Bits 22-23 reserved */
80 /* Bits 25-31 reserved */
[all …]
H A Dipa_reg-v3.5.1.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 /* Bits 5-31 reserved */
40 [H_DCPH] = BIT(16),
46 /* Bits 22-31 reserved */
55 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
57 /* Bits 22-23 reserved */
59 /* Bits 25-31 reserved */
66 [MEM_BADDR] = GENMASK(31, 16),
[all …]
H A Dipa_reg-v3.1.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (C) 2022-2024 Linaro Ltd. */
6 #include <linux/bits.h>
18 /* Bits 5-31 reserved */
40 [H_DCPH] = BIT(16),
41 /* Bits 17-31 reserved */
50 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
52 /* Bits 22-23 reserved */
54 /* Bits 25-31 reserved */
61 [MEM_BADDR] = GENMASK(31, 16),
[all …]
/linux/drivers/pci/
H A Dpci-bridge-emul.c1 // SPDX-License-Identifier: GPL-2.0
21 #include "pci-bridge-emul.h"
28 * struct pci_bridge_reg_behavior - register bits behaviors
29 * @ro: Read-Only bits
30 * @rw: Read-Write bits
31 * @w1c: Write-1-to-Clear bits
33 * Reads and Writes will be filtered by specified behavior. All other bits not
36 * multi-bit fields) when read".
39 /* Read-only bits */
42 /* Read-write bits */
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c1 // SPDX-License-Identifier: ISC
9 * Description: This function make 16 bit unsigned multiplication.
10 * To fit the output into 16 bits the 32 bit multiplication result is right
11 * shifted by 16 bits.
15 return (u16) (((u32) op1 * (u32) op2) >> 16); in qm_mulu16()
19 * Description: This function make 16 bit multiplication and return the result
20 * in 16 bits. To fit the multiplication result into 16 bits the multiplication
21 * result is right shifted by 15 bits. Right shifting 15 bits instead of 16 bits
23 * When both the 16bit inputs are 0x8000 then the output is saturated to
39 * result. If the result overflow 32 bits, the output will be saturated to
[all …]
/linux/Documentation/userspace-api/media/rc/
H A Drc-protos.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
22 Some remotes have a pointer-type device which can used to control the
29 rc-5 (RC_PROTO_RC5)
30 -------------------
32 This IR protocol uses manchester encoding to encode 14 bits. There is a
38 .. flat-table:: rc5 bits scancode mapping
41 * - rc-5 bit
43 - scancode bit
45 - description
47 * - 1
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d-pico-hobbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "imx7d-pico.dtsi"
8 model = "TechNexion PICO-IMX7D Board using Hobbit baseboard";
9 compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d";
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "gpio-led";
23 compatible = "simple-audio-card";
24 simple-audio-card,name = "imx7-sgtl5000";
[all …]
/linux/drivers/ras/amd/atl/
H A Dreg_fields.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 * Rev Fieldname Bits
46 * Rev Fieldname Bits
69 * Rev Fieldname Bits
77 * DF4 DstFabricID [27:16]
80 * DF4p5 DstFabricID [23:16]
85 #define DF4_DST_FABRIC_ID GENMASK(27, 16)
86 #define DF4p5_DST_FABRIC_ID GENMASK(23, 16)
94 * Rev Fieldname Bits
100 * DF3 DieIdMask [18:16]
[all …]
/linux/drivers/mfd/
H A Ddb8500-prcmu-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) ST-Ericsson SA 2010
15 #define BITS(_start, _end) ((BIT(_end) - BIT(_start)) + BIT(_end)) macro
60 #define PRCM_ARM_CHGCLKREQ_PRCM_ARM_DIVSEL BIT(16)
83 #define PRCM_HOSTACCESS_REQ_WAKE_REQ BIT(16)
120 #define PRCM_PLL_FREQ_D_MASK BITS(0, 7)
122 #define PRCM_PLL_FREQ_N_MASK BITS(8, 13)
123 #define PRCM_PLL_FREQ_R_SHIFT 16
124 #define PRCM_PLL_FREQ_R_MASK BITS(16, 18)
143 #define PRCM_DSI_PLLOUT_SEL_DSI0_PLLOUT_DIVSEL_MASK BITS(0, 2)
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9261ek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 /dts-v1/;
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
44 bits-per-pixel = <16>;
45 atmel,lcdcon-backlight;
[all …]
/linux/drivers/net/ethernet/emulex/benet/
H A Dbe_hw.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2005-2016 Broadcom.
7 * linux-drivers@emulex.com
17 * it writes the register with hi=1 and the upper bits of the physical address
20 * bits in the address. It must poll the ready bit until the command is
33 #define SLIPORT_SEMAPHORE_OFFSET_SH 0x94 /* PCI-CFG offset */
44 #define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
90 #define PCICFG_PM_CONTROL_MASK 0x108 /* bits 3 & 8 */
109 #define SLI_INTF_HINT1_SHIFT 16
127 #define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
[all …]
/linux/arch/sparc/kernel/
H A Dbtext.c1 // SPDX-License-Identifier: GPL-2.0
24 static void draw_byte_32(const unsigned char *bits, unsigned int *base, int rb);
25 static void draw_byte_16(const unsigned char *bits, unsigned int *base, int rb);
26 static void draw_byte_8(const unsigned char *bits, unsigned int *base, int rb);
47 return -EINVAL; in btext_initialize()
49 return -EINVAL; in btext_initialize()
51 return -EINVAL; in btext_initialize()
68 return -EINVAL; in btext_initialize()
73 g_max_loc_Y = height / 16; in btext_initialize()
76 dispDeviceDepth = depth == 15 ? 16 : depth; in btext_initialize()
[all …]
/linux/drivers/dma/idxd/
H A Dregisters.h1 /* SPDX-License-Identifier: GPL-2.0 */
52 u64 bits; member
58 u64 total_wq_size:16;
72 u64 bits; member
86 u64 bits; member
95 u64 bits; member
104 u64 bits[4]; member
114 u64 grpcfg:16;
115 u64 wqcfg:16;
116 u64 msix_perm:16;
[all …]
/linux/lib/crc/arm64/
H A Dcrc-t10dif-core.S2 // Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
5 // Copyright (C) 2019-2024 Google LLC
17 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
65 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
72 .arch armv8-a+crypto
96 * Pairwise long polynomial multiplication of two 16-bit values
100 * by two 64-bit values
115 * 2 (w0*x2 ^ w1*x1) << 16 ^ | (y0*z2 ^ y1*z1) << 16 ^
128 * and after performing 8x8->16 bit long polynomial multiplication of
130 * we obtain the following four vectors of 16-bit elements:
[all …]
/linux/drivers/net/ethernet/sgi/
H A Dmeth.h4 #define TX_RING_ENTRIES 64 /* 64-512?*/
6 #define RX_RING_ENTRIES 16 /* Do not change */
11 #define METH_RX_HEAD 34 /* status + 3 quad garbage-fill + 2 byte zero-pad */
27 u64 len:16; /*Transmit length in bytes*/
32 * It consists of header, 0-3 concatination
43 u64 data_len:16; /*Length of valid data in bytes-1*/
47 u64 pad2:16; /* should be 0 */
48 u64 len:16; /*length of buffer data - 1*/
71 u64 ip_chk_sum:16;
84 u64 rx_len:16;
[all …]
/linux/lib/zlib_inflate/
H A Dinftrees.c1 /* inftrees.c -- generate Huffman trees for efficient decoding
2 * Copyright (C) 1995-2005 Mark Adler
13 The code lengths are lens[0..codes-1]. The result starts at *table,
14 whose indices are 0..2^bits-1. work is a writable array of at least
17 -1 is an invalid code, and +1 means that ENOUGH isn't enough. table
18 on return points to the next available entry's address. bits is the
19 requested root table index bits, and on return it is the actual root
20 table index bits. It will differ if the request is greater than the
24 code **table, unsigned *bits, unsigned short *work) in zlib_inflate_table() argument
26 unsigned len; /* a code's length in bits */ in zlib_inflate_table()
[all …]
/linux/arch/arm64/crypto/
H A Dpolyval-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
22 * two-step process only requires 1 finite field reduction for every 8
65 .arch armv8-a+crypto
72 * Computes the product of two 128-bit polynomials in X and Y and XORs the
73 * components of the 256-bit product into LO, MI, HI.
84 * Later, the 256-bit result can be extracted as:
96 ext v25.16b, X.16b, X.16b, #8
97 ext v26.16b, Y.16b, Y.16b, #8
98 eor v25.16b, v25.16b, X.16b
99 eor v26.16b, v26.16b, Y.16b
[all …]

12345678910>>...43