| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchFixupKinds.h | 1 //===- LoongArchFixupKinds.h - LoongArch Specific Fixup Entries -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
26 // 16-bit fixup corresponding to %b16(foo) for instructions like bne.
28 // 21-bit fixup corresponding to %b21(foo) for instructions like bnez.
30 // 26-bit fixup corresponding to %b26(foo)/%plt(foo) for instructions b/bl.
32 // 20-bit fixup corresponding to %abs_hi20(foo) for instruction lu12i.w.
34 // 12-bit fixup corresponding to %abs_lo12(foo) for instruction ori.
36 // 20-bit fixup corresponding to %abs64_lo20(foo) for instruction lu32i.d.
38 // 12-bit fixup corresponding to %abs_hi12(foo) for instruction lu52i.d.
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | mach | 2 #------------------------------------------------------------
8 #------------------------------------------------------------
9 # if set, it's for the 64-bit version of the architecture
10 # yes, this is separate from the low-order magic number bit
11 # it's also separate from the "64-bit libraries" bit in the
14 # Reference: https://opensource.apple.com/source/cctools/cctools-949.0.1/
15 # include/mach-o/loader.h
17 0 name mach-o-cpu
20 # 32-bit ABIs.
36 >>>4 belong&0x00ffffff 12 uvaxIII
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| H A D | audio | 2 #------------------------------------------------------------------------------
12 >12 belong 1 8-bit ISDN mu-law,
14 >12 belong 2 8-bit linear PCM [REF-PCM],
16 >12 belong 3 16-bit linear PCM,
18 >12 belong 4 24-bit linear PCM,
20 >12 belong 5 32-bit linear PCM,
22 >12 belong 6 32-bit IEEE floating point,
24 >12 belong 7 64-bit IEEE floating point,
26 >12 belong 8 Fragmented sample data,
27 >12 belong 10 DSP program,
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| /freebsd/sys/contrib/dev/rtw88/ |
| H A D | rtw8821c.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
19 static const s8 lna_gain_table_0[8] = {22, 8, -6, -22, -31, -40, -46, -52};
20 static const s8 lna_gain_table_1[16] = {10, 6, 2, -2, -6, -10, -14, -17,
21 -20, -24, -28, -31, -34, -37, -40, -44};
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8821ce_efuse_parsing()
32 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8821cu_efuse_parsing()
38 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8821cs_efuse_parsing()
50 struct rtw_hal *hal = &rtwdev->hal; in rtw8821c_read_efuse()
51 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_read_efuse()
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| H A D | tx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
27 #define RTW_TX_DESC_W0_BMC BIT(24)
28 #define RTW_TX_DESC_W0_LS BIT(26)
29 #define RTW_TX_DESC_W0_DISQSELSEQ BIT(31)
31 #define RTW_TX_DESC_W1_QSEL GENMASK(12,
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| /illumos-gate/usr/src/cmd/file/ |
| H A D | magic | 42 #>4 byte 1 32-bit
62 #>18 short 12 UNKNOWN
77 0 short 070702 cpio archive - CRC header
78 0 string 070702 ASCII cpio archive - CRC header
79 0 short 070707 cpio archive - CHR (-c) header
80 0 string 070707 ASCII cpio archive - CHR (-c) header
89 >15 ubyte >0 - version %ld
90 0 short 0401 unix-rt ldp
94 >15 ubyte >0 - version %ld
97 >15 ubyte >0 - version %ld
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVFixupKinds.h | 1 //===-- RISCVFixupKinds.h - RISC-V Specific Fixup Entries ------
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| /freebsd/sys/contrib/dev/rtw89/ |
| H A D | txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode()
41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs()
49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs()
62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss()
71 #define RTW89_TXWD_BODY0_MORE_DATA BIT(23)
72 #define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22)
73 #define RTW89_TXWD_BODY0_FW_DL BIT(20)
76 #define RTW89_TXWD_BODY0_STF_MODE BIT(10)
77 #define RTW89_TXWD_BODY0_WD_PAGE BIT(7)
[all …]
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| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
18 #define BAC_OOBS_SEL BIT(4)
20 #define B_BAC_EQ_SEL BIT(5)
24 #define B_PCIE_BIT_PSAVE BIT(15)
26 #define OFFSET_CAL_MODE BIT(13)
27 #define BAC_RX_TEST_EN BIT(6)
32 #define B_PCIE_BIT_PINOUT_DIS BIT(3)
34 #define BAC_CMU_EN_DLY_MASK GENMASK(15, 12)
37 #define B_PCIE_BIT_RD_SEL BIT(2)
45 #define OOBS_LEVEL_MASK GENMASK(12, 8)
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| /freebsd/sys/contrib/dev/mediatek/mt76/ |
| H A D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */
42 #define MT_TX_FREE_COUNT GENMASK(12, 0)
46 #define MT_TX_FREE_PAIR BIT(31)
55 #define MT_TXD1_LONG_FORMAT BIT(31)
56 #define MT_TXD1_TGID BIT(30)
58 #define MT_TXD1_AMSDU BIT(23)
63 #define MT_TXD1_ETH_802_3 BIT(15)
64 #define MT_TXD1_VTA BIT(10)
67 #define MT_TXD2_FIX_RATE BIT(31)
68 #define MT_TXD2_FIXED_RATE BIT(30)
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| H A D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */
28 #define MT_RXD0_MESH BIT(18)
29 #define MT_RXD0_MHCP BIT(19)
38 #define MT_RXD1_NORMAL_GROUP_1 BIT(16)
39 #define MT_RXD1_NORMAL_GROUP_2 BIT(17)
40 #define MT_RXD1_NORMAL_GROUP_3 BIT(18)
41 #define MT_RXD1_NORMAL_GROUP_4 BIT(19)
42 #define MT_RXD1_NORMAL_GROUP_5 BIT(20)
44 #define MT_RXD1_NORMAL_CM BIT(23)
45 #define MT_RXD1_NORMAL_CLM BIT(24)
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| /illumos-gate/usr/src/uts/common/io/sdcard/adapters/sdhost/ |
| H A D | sdhost.h | 48 #define BIT(x) (1 << (x)) macro
72 * Slot-specific CSRs
111 #define BLKSZ_BOUNDARY_4K (0 << 12)
112 #define BLKSZ_BOUNDARY_8K (1 << 12)
113 #define BLKSZ_BOUNDARY_16K (2 << 12)
114 #define BLKSZ_BOUNDARY_32K (3 << 12)
115 #define BLKSZ_BOUNDARY_64K (4 << 12)
116 #define BLKSZ_BOUNDARY_128K (5 << 12)
117 #define BLKSZ_BOUNDARY_256K (6 << 12)
118 #define BLKSZ_BOUNDARY_512K (7 << 12)
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7603/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */
10 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22)
34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5)
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */
15 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1)
26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0)
27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
[all …]
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| /freebsd/sys/amd64/vmm/amd/ |
| H A D | amdvi_priv.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #define BIT(n) (1ULL << (n)) macro
38 /* Return value of bits[n:m] where n and (n >= ) m are bit positions. */
40 ((1 << (((n) - (m)) + 1)) - 1))
45 #define AMDVI_PCI_CAP_IOTLB BIT(0) /* IOTLB is supported. */
46 #define AMDVI_PCI_CAP_HT BIT(1) /* HyperTransport tunnel support. */
47 #define AMDVI_PCI_CAP_NPCACHE BIT(2) /* Not present page cached. */
48 #define AMDVI_PCI_CAP_EFR BIT(3) /* Extended features. */
49 #define AMDVI_PCI_CAP_EXT BIT(4) /* Miscellaneous information reg. */
[all …]
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| /illumos-gate/usr/src/uts/intel/io/vmm/amd/ |
| H A D | amdvi_priv.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #define BIT(n) (1ULL << (n)) macro
38 /* Return value of bits[n:m] where n and (n >= ) m are bit positions. */
40 ((1 << (((n) - (m)) + 1)) - 1))
45 #define AMDVI_PCI_CAP_IOTLB BIT(0) /* IOTLB is supported. */
46 #define AMDVI_PCI_CAP_HT BIT(1) /* HyperTransport tunnel support. */
47 #define AMDVI_PCI_CAP_NPCACHE BIT(2) /* Not present page cached. */
48 #define AMDVI_PCI_CAP_EFR BIT(3) /* Extended features. */
49 #define AMDVI_PCI_CAP_EXT BIT(4) /* Miscellaneous information reg. */
[all …]
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| /freebsd/sys/dev/sfxge/common/ |
| H A D | efx_regs.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2016 Solarflare Communications Inc.
48 * FR_AB_EE_VPD_CFG0_REG_SF(128bit):
54 * FR_AB_EE_VPD_CFG0_REG(128bit):
94 * FR_AB_PCIE_SD_CTL0123_REG_SF(128bit):
100 * FR_AB_PCIE_SD_CTL0123_REG(128bit):
162 * FR_AB_PCIE_SD_CTL45_REG_SF(128bit):
168 * FR_AB_PCIE_SD_CTL45_REG(128bit):
198 #define FRF_AB_PCIE_DEQ3_LBN 12
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| /illumos-gate/usr/src/contrib/ast/src/lib/libast/uwin/ |
| H A D | crypt.c | 59 #define _PASSWORD_EFMT1 '-'
73 * by Wayne Patterson, 1987, ISBN 0-8476-7438-X.
76 * Communications of the ACM, vol. 22, pp. 594-597, Nov. 1979.
79 * IEEE Spectrum, vol. 16, pp. 32-39, July 1979.
95 #error C_block structure assumes 8 bit characters
101 * This avoids use of bit fields (your compiler may be sloppy with them).
108 * define "B64" to be the declaration for a 64 bit integer.
130 * Cipher-block representation (Bob Baldwin):
133 * representation is to store one bit per byte in an array of bytes. Bit N of
134 * the NBS spec is stored as the LSB of the Nth byte (index N-1) in the array.
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| /illumos-gate/usr/src/common/mc/mc-amd/ |
| H A D | mcamd_rowcol_tbl.c | 33 * =========== Chip-Select Bank Address Mode Encodings =======================
49 { MC_F_REVS_FG, 12, bnkaddr_tbls_f },
80 { 12, &dram_addrmap_f_64 },
81 { 12, &dram_addrmap_f_128 },
117 * Chip-select interleave is performed by addressing across the columns
118 * of the first row of internal bank-select 0 on a chip-select, then the
119 * next row on internal bank-select 1, then 2 then 3; instead of then
120 * moving on to the next row of this chip-select we then rotate across
121 * other chip-selects in the interleave. The row/column/bank mappings
123 * as follows, using an example for CS Mode 0000 revision CG and earlier 64-bit
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | mc13xxx.txt | 4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892"
7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used
8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used
9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used
10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
12 Sub-nodes:
13 - codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
16 - leds : Contain the led nodes and initial register values in property
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMFixupKinds.h | 1 //===-- ARMFixupKinds.h - ARM Specific Fixup Entries -------
[all...] |
| /illumos-gate/usr/src/uts/common/io/sfxge/common/ |
| H A D | efx_regs.h | 2 * Copyright (c) 2007-2015 Solarflare Communications Inc.
48 * FR_AB_EE_VPD_CFG0_REG_SF(128bit):
54 * FR_AB_EE_VPD_CFG0_REG(128bit):
95 * FR_AB_PCIE_SD_CTL0123_REG_SF(128bit):
101 * FR_AB_PCIE_SD_CTL0123_REG(128bit):
164 * FR_AB_PCIE_SD_CTL45_REG_SF(128bit):
170 * FR_AB_PCIE_SD_CTL45_REG(128bit):
200 #define FRF_AB_PCIE_DEQ3_LBN 12
211 * FR_AB_PCIE_PCS_CTL_STAT_REG_SF(128bit):
217 * FR_AB_PCIE_PCS_CTL_STAT_REG(128bit):
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 1 //===- ARCInstrFormats.td - ARC Instruction Formats --------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
21 "\n return isUInt<"#BSz#">(N->getSExtValue());"> {
27 "\n return isInt<"#BSz#">(N->getSExtValue());"> {
31 // e.g. s3 field may encode the signed integers values -1 .. 6
34 "\n return isInt<"#BSz#">(N->getSExtValue());"> {
64 class ExtMode<bit mode, string instSfx, string asmSfx> {
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| /illumos-gate/usr/src/uts/common/sys/nxge/ |
| H A D | nxge_txdma_hw.h | 64 /* Transmit Addressing Mode: Set to 1 to select 32-bit addressing mode */
68 #define TX_ADDR_MD_SET_32 0x0000000000000001ULL /* 1 to select 32 bit */
99 #define TX_PKT_DESC_MARK_SHIFT 62 /* bit 62 */
102 #define TX_PKT_DESC_SOP_SHIFT 63 /* bit 63 */
117 uint32_t sad:12;
120 uint32_t sad:12;
146 uint32_t sad:12;
148 uint32_t sad:12;
199 uint32_t staddr_base:12;
201 uint32_t staddr_base:12;
[all …]
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